DSD'2001
EUROMICRO
SYMPOSIUM ON DIGITAL SYSTEMS DESIGN
Architectures,
Methods, and Tools
Warsaw,Poland,
September
4 - 6, 2001
Programme
Chair:
Adam Postula
CSEE, Univ. of Queensland
St.Lucia Campus, Brisbane, Australia
E-mail: Adam Postula
Deputy
Programme Chair:
Martyn Edwards
Department of Computation,
UMIST,Manchester, M60 1QD,
United Kingdom
E-mail: Martyn
Edwards
Programme
Committee:
D. Abramson
, Monash U. (AU)
M. Anido , U. of Rio de aneiro,(BR)
S. Baranov, Ben-Gurion U.,(IL)
R. Drechsler , A-L U. of Freiburg,(D)
N. Dutt
, U. of Calif., Irvine,(USA)
P. Eles,
Linköping U. (S)
M. Fernandez
, U. Complutense,(E)
M. Glesner
, Darmst. U. of Tech., (D)
A. Gonzalez
, Pol. U. of Catalunya,(E)
E. Gramatová
, Sl. Ac. of Sci., (SLO)
L. Józwiak
, Eindh. U. of Tech., (NL)
K. Judmann
, Tech. U. of Vienna,(A)
K. Kuchcinski
, Lund U., (S)
L. Lindh
, Mälardalen U.,(S)
T. Luba
, Warsaw U. of Tech.,(PL)
J. Madsen
, Tech. Univ. of Dk., (DK)
A. Nunez , U. of Las Palmas G.C., (E)
A. Pawlak
, Silesian U. of Tech., (PL)
M. Perkowski
, Portland St. U.,(USA)
A. Postula
, U. of Queensland , (AU)
B. Rouzeyre
, U. Montpellier II, (F)
W. Rosenstiel
, U. Tuebingen,(D)
S. Ruelke
, IIS-FhG Dresden, (D)
M. Sami
, Politecnico di Milano,(I)
T. Sasao
, Kyushu Ins. of Tech., (J)
G. Saucier
, INPG/CSI, (F)
N. Scarabottolo
, Pol. Di Milano, (I)
H. Selvaraj
, U. of Nevada, (USA)
J. Sosnowski
,Warsaw U.of Tech.(PL)
M. Stevens
, Eindh. U. of Tech., (NL)
D. Tabak
, George Mason U.,(USA)
M. Valero
, Pol. U. of Catalunya.,(E)
F. Tirado
, U. Complutense,(E)
K. Waldschmidt
, J. W. Goethe U.,(D)
C. Wolinski
, IRISA, Rennes, (F)
H. Yasuura
, Kyushu U., (J)
Steering Committee:
L.Józwiak,Eindhoven.Univ.of Tech ,NL
K. Kuchcinski, Lund Univ., S
A. Nunez, Univ. of Las Palmas GC, E
Updated Information:
See the EUROMICRO WWW :
http://www.euromicro.org
or directly the DSD Website:
CALL FOR PAPERS |
The Symposium
on Digital System Design addresses both architectures and implementations
of (embedded) digital systems as well as efficient design methods and
tools. It is a discussion forum of the state-of-the-art research, development
and applications for the research community working on computer system
architecture, microprocessor architecture and design, logic design, application
specific integrated processors, systems on a chip, hardware/software co-design,
and design automation.
Topics of interest include
but are not limited to:
- CPU and memory architectures:
arithmetic and logic units, co-processors, pipelining, superscalarity,
cache, MMU.
- Special architectures:
DSP, graphic and image processors, Custom Computing Machines, processing
arrays and FPGAs, reconfigurable multiprocessor structures.
- Specification and modeling:
(hardware/software) system specification and modeling, system and
hardware design languages, component modeling, and timing issues.
- Validation: simulation,
emulation, prototyping and testing at the system, RT and logic level;
multilevel- and co- simulation; formal verification.
- Synthesis: system, hardware-software,
high-level, RT-level and logic synthesis; design for low-power, speed
and testability; system, hardware/software and logic partitioning,
design of asynchronous systems.
- System On Chip design:
platform based design, mega cell compilation, deep sub-micron design
issues, signal integrity, technology aware high level design tools,
Intellectual Property and design reuse.
SUBMISSION OF PAPERS
Prospective authors
are encouraged to submit by Internet or e-mail a PostScript or PDF version
of their full paper to the program chairman. If
electronic submission is not possible, five copies of the full paper should
be sent by post. The
paper should not exceed 4000 words and include an abstract of up to 150
words. A cover page
should clearly show the title of the paper and the name, mailing address,
e- mail address and fax number of the author to contact as well as the
topic areas of the submitted paper. In
order to conduct a blind review by peers no indication of authors of the
submitted paper should appear in the rest of the paper, including bibliographical
references (there author names should be substituted by a dash line).
The following
signed statement should be included on the title page: "Neither
this paper nor any version close to it has been or is being offered elsewhere
for publication.
All necessary clearances have been obtained for the publication of this
paper. If accepted, the paper will be made available in Camera-ready forms
by June 15th, 2001, and it will be personally presented at the DSD'2001
EUROMICRO Symposium by the author or one of the co-authors. The
presenting author(s) will pre- register for DSD'2001 before the due date
of the Camera-ready paper."
The program committee will decide for each accepted paper if it will be presented in a long (30 min.) or short (15 min.) presentation or as a poster. For long and short presentation papers 8 pages will be assigned, and for poster papers 4 pages will be assigned in the proceedings. Papers exceeding the page limit will be charged NLG 100 per page in excess. The proceedings will be published by the IEEE Computer Society.