Speaker: John Ko Shield (nee Xue)
When: 1:00PM Thursday 22nd April 2004
Venue: 78-344
Abstract:
Electronic Design Automation Tools (EDA) are increasing important as the complexity of hardware designs increases. In the area of reconfigurable computing the tools available require significant design experience and understanding in how hardware works. Recently there has been considerable effort in improving design verification for system level or algorithmic level design. The next logical step is improvement of design of tools that will assist in automatic synthesis of hardware designs from algorithmic or behavioural design descriptions. The area of memory synthesis has been identified as an important subarea of such a development effort, as memory hardware and how it is used is one of the major factors in system performance. Most of the previous work has assumed fixed memory architecture and all reviewed literature attempted to use an architecturally fixed method to interface between the memory and computational logic. This takes a narrow view of memory synthesis as the interface can cause significant inefficiencies for certain designs. The proposed research intends to look at application specific synthesis for a variable memory system in the context of reconfigurable computing. Compared to most other research in this area the hardware interface for the memory system will be generated in response to a memory specification and the attributes of the application. Similar research looks at a fixed memory controller using a hardware wrapper library that connects to the actual memory and may not always be the best solution, or attempts to use a monolith finite state machine definition that again is not always the best solution.
Biography:
John graduated from The University of Queensland with a Bachelor of Engineering (Electrical) degree in 2002 and is currently a PhD candidate in the School of Information Technology and Electrical Engineering. His interests include programming and electronics. He is currently conducting research in the area of Reconfigurable Computing.
Contact: Dr Peter Sutton