Speaker: xxie
When: 1:00PM Thursday 7th October 2004
Venue: 78-420
Abstract:
Recent FPGA technologies have become sophisticated enough to support both System-on-Chip (SoC) implementation and run-time partial reconfiguration. The custom hardware can increase the performance in many computing areas and offer more flexibility for both system designers and the end-users. With above capabilities it would be promising to see a self-contained FPGA SoC with run-time reconfigurable system support at Operating System level. The aim of this research is to seek better and more intuitive custom hardware integration into conventional software and system development methodologies.
One possible approach is to view the reconfigurable hardware modules as an operating system’s process similar to the software process. The communication between hardware module and software process could be an extension based on existing software Inter-Process Communication (IPC); some IPC channels like the FIFO, shared memory and signals resembles some properties that are well suited for hardware implementation. The existing operating system’s kernel should have some new facilities and modifications to ensure efficiency and flexibility in the hardware process/module integration with OS; some possible areas are worth the researching including: kernel device driver for the new IPC, system call interface for the reconfigurable system and hardware process management unit.
Embedded Linux is selected for the base operating system in this project due to its openness and portability. Xilinx’s Virtex II FPGA is the hardware environment of this research because some its feature sets especially like the partial reconfiguration, dual port memory and Fast Simplex Link which could be used to fulfil the above mentioned research aims. The candidate has reviewed the current enabling FPGA technologies, the Linux’s process principle, other researches about the hardware and software interfaces and integration. The seminar presents the research plan and timeline for the M.Phil program.
Contact: Dr John Williams