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 A Hybrid Reconfigurable Cluster-on-Chip Architecture With Message Passing Interface For Image Proces
Seminar Information

Speaker: Syed Irfanullah Azeezullah

When: 1:00PM Tuesday 21st August 2007

Venue: GPSouth 78-622

Abstract:

We describe a hybrid reconfigurable cluster-on-chip architecture with a cross-platform Message Passing Interface (MPI), a cross-platform parallel image processing library and a sample application. In this paper we describe the system, network architecture, MPI library and the parallel image processing library implementations. We demonstrate the performance, scalability and suitability of MPI as a software interface to enable cross-platform application paral- lelism on reconfigurable hybrid cluster-on-chip systems and desktop cluster systems. The presented results are promising, showing the suitability, scalability and performance of parallelisation of image processing algorithms with a cross- platform MPI communication back-end. Our long-term research goal is to support native hardware nodes capable of functioning as fully-fledged MPI nodes.

Biography:

Irfan Syed is a PhD candidate in the Embedded Systems Research Division

Contact: Dr John Williams