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Re: AW: AW: [microblaze-uclinux] Xmdstub connect on serial port

To: microblaze-uclinux@itee.uq.edu.au
Subject: Re: AW: AW: [microblaze-uclinux] Xmdstub connect on serial port
From: John Williams <jwilliams@itee.uq.edu.au>
Date: Thu, 24 Jul 2003 21:41:12 +1000
In-reply-to: <6DAE280BAC3BFD498D78AC4E1D36C2744DA950@shf-2.shf-berlin.local>
References: <6DAE280BAC3BFD498D78AC4E1D36C2744DA950@shf-2.shf-berlin.local>
Reply-to: microblaze-uclinux@itee.uq.edu.au
Sender: owner-microblaze-uclinux@itee.uq.edu.au
User-agent: Mozilla/5.0 (Windows; U; Win98; en-US; rv:1.4) Gecko/20030529

Schunke Jan-Hendrik wrote:

> Converint to mcs and writing to prom worked for your bistream. I have tried it with my bitstream but that did not work.

> Can you send me your reports (srp, par, mrp, pad, bld) and I can check if I find any differences there?

They are attached.  Let me know if you need anything more.  I must also 
confirm that I'm building the same as the mbvanilla_ddr on the web site. 
  I have an internal CVS for my hardware - the zip files on the web 
don't track every tiny update, but don't think I've made any changes 
since the last update.

John

Release 5.2.02i - ngdbuild F.30a
Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -p xc2v1000fg456-4 -nt timestamp -bm system.bmm -uc
system.ucf z:/microblaze/mbvanilla_ddr/implementation/system.ngc system.ngd 

Reading NGO file "z:/microblaze/mbvanilla_ddr/implementation/system.ngc" ...
Reading component libraries for design expansion...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/microblaze_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/my_ddr_clk_gen_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/ddr_controller_wrapper.ngc"...
Launcher: "ddr_v1_00_b_virtex2_async_fifo.ngo" is up to date.
Loading design module
"z:\microblaze\mbvanilla_ddr\implementation\ddr_v1_00_b_virtex2_async_fifo.ngo".
..
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/system_memcon_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/console_uart_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/debug_uart_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/system_intc_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/system_timer_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/system_gpio_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/d_lmb_bram_if_cntlr_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/i_lmb_bram_if_cntlr_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/bram_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/d_opb_v20_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/i_lmb_v10_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/d_lmb_v10_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/system_dcm_wrapper.ngc"...
Loading design module
"z:/microblaze/mbvanilla_ddr/implementation/dcm_feedback_bufg_wrapper.ngc"...

Annotating constraints to design from file "system.ucf" ...
INFO:NgdBuild:757 - Line 4 in 'system.ucf': The constraint for NET 'sys_clk' is
   being attached to the equivalent NET 'conn_0_bram_clk'.
Attached a PULLDOWN primitive to pad net ddr_dqs<0> 
Attached a PULLDOWN primitive to pad net ddr_dqs<1> 

Checking timing specifications ...

Processing BMM file ...

Checking expanded design ...
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU1'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU4'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU7'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU10'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU13'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU16'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU19'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU22'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU25'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU28'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU31'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU34'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU37'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU40'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU43'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU46'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU81'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU130'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU1'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU4'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU7'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU10'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU13'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU16'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU19'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU22'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU25'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU28'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU31'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU34'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU37'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU40'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU43'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU46'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU81'
   has unconnected output pin
WARNING:NgdBuild:440 - FF primitive
   'ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU130'
   has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_memcon/opb_memcon_0_i/mccr_page_mode_i1' has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_memcon/opb_memcon_0_i/mccr_fast_mode_i1' has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_memcon/opb_memcon_0_i/mccr_page_mode_i0' has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_memcon/opb_memcon_0_i/mccr_fast_mode_i0' has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_memcon/opb_memcon_0_i/seqaddr_ff_i'
   has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i30' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i31' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i0' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i1' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i2' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i3' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i4' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i5' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i6' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i7' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i8' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i9' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i10' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i11' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i12' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i13' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i14' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i15' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i16' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i17' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i18' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i19' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i20' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i21' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i22' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i23' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i24' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i25' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i26' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i27' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i28' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i29' has unconnected
   output pin
WARNING:NgdBuild:443 - SFF primitive 'system_timer/opb_timer_0_i/seqaddr_ff_i'
   has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_timer/opb_timer_0_i/abus_ff_i24'
   has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_timer/opb_timer_0_i/abus_ff_i25'
   has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_timer/opb_timer_0_i/abus_ff_i30'
   has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_timer/opb_timer_0_i/abus_ff_i31'
   has unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i12' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i11' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i10' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i9' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i8' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i7' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i6' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i5' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i4' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i3' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i2' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i1' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i0' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i20' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i19' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i18' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i17' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i16' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i15' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i14' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i13' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i12' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i11' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i10' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i9' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i8' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i7' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i6' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i5' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i4' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i3' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i2' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i1' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i0' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i13' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i14' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i15' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i16' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i17' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i18' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i19' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive
   'system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i20' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/seqaddr_ff_i' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/abus_ff_i24' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/abus_ff_i25' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/abus_ff_i26' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/abus_ff_i27' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/abus_ff_i28' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/abus_ff_i30' has
   unconnected output pin
WARNING:NgdBuild:443 - SFF primitive 'system_gpio/opb_gpio_0_i/abus_ff_i31' has
   unconnected output pin
WARNING:NgdBuild:454 - logical net 'net_vcc7<6>' has no load
WARNING:NgdBuild:479 - The input pad net 'ddr_clk_fb' is driving one or more
   clock loads that should only use a dedicated clock buffer. This could result
   in large clock skews on this net. Check whether the correct type of BUF is
   being used to drive the clock buffer.
WARNING:NgdBuild:477 - clock net 'sys_clk_90' has non-clock connections. These
   problematic connections include: pin i0 on block
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/clkgen_i/clk90_n1 with type LUT1
WARNING:NgdBuild:477 - clock net 'ddr_clk_90' has non-clock connections. These
   problematic connections include: pin i0 on block
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/io_reg_i/clk_ddr_rddata_n1 with type
   LUT1
WARNING:NgdBuild:454 - logical net 'conn_0_bram_addr<30>' has no load
WARNING:NgdBuild:454 - logical net 'conn_0_bram_addr<31>' has no load
WARNING:NgdBuild:454 - logical net 'conn_0_bram_rst' has no load
WARNING:NgdBuild:454 - logical net 'conn_1_bram_rst' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/jump_taken' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/reg_write' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/reg_addr<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<0>' has no load
WARNING:NgdBuild:454 - logical net
   'microblaze/microblaze_0_i/iopb_interface_i/iopb_interrupt' has no load
WARNING:NgdBuild:454 - logical net
   'microblaze/microblaze_0_i/dopb_interface_i/dopb_interrupt' has no load
WARNING:NgdBuild:477 - clock net 'conn_0_bram_clk' has non-clock connections.
   These problematic connections include: pin i0 on block
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/io_reg_i/clk_n1 with type LUT1
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<15>' has no load
WARNING:NgdBuild:454 - logical net
   'microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i0/carry_out' has
   no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<30>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<26>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<25>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/pc_ex<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<17>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<16>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<15>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<14>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<13>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<12>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<11>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<10>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<9>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<8>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<0>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<31>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<30>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<29>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<28>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<27>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<26>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<25>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<24>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<23>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<22>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<21>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<20>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<19>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/new_reg_value<18>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/prefetch_addr<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/prefetch_addr<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/prefetch_addr<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/reg_addr<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/reg_addr<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/reg_addr<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/reg_addr<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<7>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<6>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<5>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<4>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<3>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<2>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/msr_reg<1>' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/interrupt_taken' has no load
WARNING:NgdBuild:454 - logical net 'microblaze/valid_instr' has no load
WARNING:NgdBuild:454 - logical net 'my_ddr_clk_gen/ddr_dcm_locked' has no load
WARNING:NgdBuild:454 - logical net 'system_memcon/mem_status_intrpt' has no load
WARNING:NgdBuild:454 - logical net 'system_memcon/mem_qwen<0>' has no load
WARNING:NgdBuild:454 - logical net 'system_memcon/mem_qwen<3>' has no load
WARNING:NgdBuild:454 - logical net 'system_memcon/mem_qwen<1>' has no load
WARNING:NgdBuild:454 - logical net 'system_memcon/mem_qwen<2>' has no load
WARNING:NgdBuild:454 - logical net 'system_memcon/mem_rec_states_out<3>' has no
   load
WARNING:NgdBuild:454 - logical net 'console_uart/interrupt' has no load
WARNING:NgdBuild:454 - logical net 'debug_uart/interrupt' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_hwxfer' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_fwxfer' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_dwxfer' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<0>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_bexfer' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<31>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<30>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<29>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<28>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<27>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<26>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<25>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<24>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<23>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<22>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<21>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<20>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<19>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<18>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<17>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<16>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<15>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<14>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<13>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<12>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<11>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<10>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<9>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<8>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<7>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<6>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<5>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<4>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<3>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<2>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_wrdbus<1>' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_hwack' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_fwack' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_beack' has no load
WARNING:NgdBuild:454 - logical net 'd_opb_v20/opb_dwack' has no load
WARNING:NgdBuild:454 - logical net 'system_dcm/clk_fx_180' has no load
WARNING:NgdBuild:454 - logical net 'system_dcm/clk_lock' has no load

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings: 278

Writing NGD file "system.ngd" ...

Writing NGDBUILD log file "system.bld"...

Release 5.2.02i - Par F.30a
Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.

Thu Jul 24 08:41:34 2003


NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The |
character is used as the data field separator. This file is also designed
to support parsing.

Input file:       system_map.ncd
Output file:      system.ncd
Part type:        xc2v1000
Speed grade:      -4
Package:          fg456

Pinout by Pin Number:

-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
Pin Number|Signal Name|Pin Usage|Pin Name|Direction|IO Standard|IO Bank #|Drive (mA)|Slew Rate|Pullup Pulldown|IOB Delay|Voltage|Constraint|
A1|||GND||||||||||
A10|gpio<23>|IOB|IO_L93P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE|||
A11||IOB|IO_L96P_0/GCLK4S|UNUSED||0|||||||
A12|||VCCAUX||||||||||
A13||IOB|IO_L93N_1|UNUSED||1|||||||
A14||IOB|IO_L54N_1|UNUSED||1|||||||
A15||IOB|IO_L51N_1/VREF_1|||1|||||1.25||
A16||IOB|IO_L22N_1|UNUSED||1|||||||
A17|ddr_addr<9>|IOB|IO_L05N_1|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
A18|ddr_addr<11>|IOB|IO_L03N_1/VRP_1|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
A19|ddr_addr<2>|IOB|IO_L01N_1|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
A2|||PROG_B||||||||||
A20|||RSVD||||||||||
A21|||VBATT||||||||||
A22|||GND||||||||||
A3|||DXP||||||||||
A4|gpio<22>|IOB|IO_L01P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
A5|gpio<18>|IOB|IO_L03P_0/VRN_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
A6||IOB|IO_L05P_0|UNUSED||0|||||||
A7|console_uart_tx|IOB|IO_L22P_0|OUTPUT|LVTTL|0|12|SLOW|NONE**|||LOCATED|
A8|gpio<9>|IOB|IO_L49P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
A9|gpio<15>|IOB|IO_L54P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
AA1|||VCCAUX||||||||||
AA10|sram_addr<5>|IOB|IO_L93P_5|OUTPUT|LVTTL|5|12|SLOW|NONE**||||
AA11|sram_addr<0>|IOB|IO_L96N_5/GCLK7S|OUTPUT|LVTTL|5|12|SLOW|NONE**||||
AA12|sram_data<31>|IOB|IO_L96N_4/GCLK1S|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
AA13|sram_data<26>|IOB|IO_L93N_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
AA14|sram_data<16>|IOB|IO_L54N_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
AA15|sram_addr<8>|IOB|IO_L49N_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AA16|sram_addr<10>|IOB|IO_L22N_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AA17|sram_addr<20>|IOB|IO_L06N_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AA18||IOB|IO_L04N_4/VREF_4|UNUSED||4|||||||
AA19||IOB|IO_L01P_4/INIT_B|UNUSED||4|||||||
AA2|||GND||||||||||
AA20||IOB|IO_L01P_3|UNUSED||3|||||||
AA21|||GND||||||||||
AA22|||VCCAUX||||||||||
AA3||IOB|IO_L01P_5/CS_B|UNUSED||5|||||||
AA4||IOB|IO_L02P_5/D7|UNUSED||5|||||||
AA5|sram_wen|IOB|IO_L04P_5/VREF_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
AA6|sram_addr<24>|IOB|IO_L19P_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
AA7|sram_data<14>|IOB|IO_L22P_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
AA8|sram_data<4>|IOB|IO_L51P_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
AA9|sram_data<2>|IOB|IO_L54P_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
AB1|||GND||||||||||
AB10|sram_addr<4>|IOB|IO_L93N_5|OUTPUT|LVTTL|5|12|SLOW|NONE**||||
AB11|||VCCAUX||||||||||
AB12|sram_cen<0>|IOB|IO_L96P_4/GCLK0P|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AB13|sram_data<22>|IOB|IO_L93P_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
AB14|sram_data<19>|IOB|IO_L54P_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
AB15|sram_addr<15>|IOB|IO_L49P_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AB16|sram_addr<17>|IOB|IO_L22P_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AB17|sram_addr<16>|IOB|IO_L06P_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AB18|sram_addr<21>|IOB|IO_L04P_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
AB19||IOB|IO_L01N_4/DOUT|UNUSED||4|||||||
AB2|||M0||||||||||
AB20|||DONE||||||||||
AB21|||PWRDWN_B||||||||||
AB22|||GND||||||||||
AB3|||M2||||||||||
AB4||IOB|IO_L02N_5/D6|UNUSED||5|||||||
AB5|sram_addr<22>|IOB|IO_L04N_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
AB6|sram_addr<28>|IOB|IO_L19N_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
AB7|sram_data<7>|IOB|IO_L22N_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
AB8|sram_data<10>|IOB|IO_L51N_5/VREF_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
AB9|sram_data<9>|IOB|IO_L54N_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
B1|||VCCAUX||||||||||
B10||IOB|IO_L93N_0|UNUSED||0|||||||
B11|ext_clk|IOB|IO_L96N_0/GCLK5P|INPUT|LVTTL|0||||NONE||LOCATED|
B12||IOB|IO_L94P_1/VREF_1|||1|||||1.25||
B13||IOB|IO_L93P_1|UNUSED||1|||||||
B14||IOB|IO_L54P_1|UNUSED||1|||||||
B15||IOB|IO_L51P_1|UNUSED||1|||||||
B16||IOB|IO_L22P_1|UNUSED||1|||||||
B17|ddr_addr<10>|IOB|IO_L05P_1|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
B18|ddr_addr<12>|IOB|IO_L03P_1/VRN_1|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
B19|ddr_bankaddr<0>|IOB|IO_L01P_1|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
B2|||GND||||||||||
B20|||TMS||||||||||
B21|||GND||||||||||
B22|||VCCAUX||||||||||
B3|||HSWAP_EN||||||||||
B4|sys_rst|IOB|IO_L01N_0|INPUT|LVTTL|0||||NONE||LOCATED|
B5|gpio<19>|IOB|IO_L03N_0/VRP_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
B6||IOB|IO_L05N_0|UNUSED||0|||||||
B7|console_uart_rx|IOB|IO_L22N_0|INPUT|LVTTL|0||||NONE||LOCATED|
B8|gpio<10>|IOB|IO_L49N_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
B9|gpio<8>|IOB|IO_L54N_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
C1||IOB|IO_L02P_7/VRN_7|UNUSED||7|||||||
C10|gpio<6>|IOB|IO_L92P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
C11|gpio<29>|IOB|IO_L95P_0/GCLK6S|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE|||
C12||IOB|IO_L94N_1|UNUSED||1|||||||
C13||IOB|IO_L92N_1|UNUSED||1|||||||
C14||IOB|IO_L52N_1|UNUSED||1|||||||
C15||IOB|IO_L49N_1|UNUSED||1|||||||
C16||IOB|IO_L21N_1/VREF_1|||1|||||1.25||
C17||IOB|IO_L04N_1|UNUSED||1|||||||
C18||IOB|IO_L02N_1|UNUSED||1|||||||
C19|||TCK||||||||||
C2||IOB|IO_L02N_7/VRP_7|UNUSED||7|||||||
C20|||GND||||||||||
C21||IOB|IO_L01N_2|UNUSED||2|||||||
C22||IOB|IO_L01P_2|UNUSED||2|||||||
C3|||GND||||||||||
C4|gpio<21>|IOB|IO_L02N_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
C5|gpio<20>|IOB|IO_L02P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
C6|gpio<16>|IOB|IO_L04P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
C7||IOB|IO_L21P_0/VREF_0|UNUSED||0|||||||
C8||IOB|IO_L24P_0|UNUSED||0|||||||
C9|gpio<1>|IOB|IO_L52P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
D1||IOB|IO_L03P_7/VREF_7|UNUSED||7|||||||
D10|gpio<5>|IOB|IO_L92N_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
D11|gpio<30>|IOB|IO_L95N_0/GCLK7P|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE|||
D12|ddr_clk|IOB|IO_L95P_1/GCLK0S|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
D13||IOB|IO_L92P_1|UNUSED||1|||||||
D14||IOB|IO_L52P_1|UNUSED||1|||||||
D15||IOB|IO_L49P_1|UNUSED||1|||||||
D16||IOB|IO_L21P_1|UNUSED||1|||||||
D17||IOB|IO_L04P_1/VREF_1|||1|||||1.25||
D18||IOB|IO_L02P_1|UNUSED||1|||||||
D19|||GND||||||||||
D2||IOB|IO_L03N_7|UNUSED||7|||||||
D20|||TDO||||||||||
D21||IOB|IO_L03N_2|UNUSED||2|||||||
D22||IOB|IO_L03P_2/VREF_2|UNUSED||2|||||||
D3|||TDI||||||||||
D4|||GND||||||||||
D5|||DXN||||||||||
D6|gpio<17>|IOB|IO_L04N_0/VREF_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
D7||IOB|IO_L21N_0|UNUSED||0|||||||
D8||IOB|IO_L24N_0|UNUSED||0|||||||
D9|gpio<0>|IOB|IO_L52N_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
E1||IOB|IO_L06P_7|UNUSED||7|||||||
E10|gpio<13>|IOB|IO_L91N_0/VREF_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
E11||IOB|IO_L94N_0/VREF_0|UNUSED||0|||||||
E12|ddr_clkn|IOB|IO_L95N_1/GCLK1P|OUTPUT|SSTL2_I|1|12*|SLOW*|NONE**|||LOCATED|
E13||IOB|IO_L91N_1|UNUSED||1|||||||
E14||IOB|IO_L91P_1/VREF_1|||1|||||1.25||
E15||IOB|IO_L24P_1|UNUSED||1|||||||
E16||IOB|IO_L06N_1|UNUSED||1|||||||
E17||IOB|IO_L06P_1|UNUSED||1|||||||
E18|sram_rst|IOB|IO_L02N_2/VRP_2|OUTPUT|LVTTL|2|12|SLOW|NONE**|||LOCATED|
E19|gpio<26>|IOB|IO_L04N_2|BIDIR|LVTTL|2|12|SLOW|NONE**|NONE|||
E2||IOB|IO_L06N_7|UNUSED||7|||||||
E20|gpio<24>|IOB|IO_L04P_2|BIDIR|LVTTL|2|12|SLOW|NONE**|NONE|||
E21|gpio<25>|IOB|IO_L06N_2|BIDIR|LVTTL|2|12|SLOW|NONE**|NONE|||
E22|gpio<27>|IOB|IO_L06P_2|BIDIR|LVTTL|2|12|SLOW|NONE**|NONE|||
E3||IOB|IO_L04P_7|UNUSED||7|||||||
E4||IOB|IO_L04N_7|UNUSED||7|||||||
E5||IOB|IO_L01P_7|UNUSED||7|||||||
E6||IOB|IO_L01N_7|UNUSED||7|||||||
E7|gpio<11>|IOB|IO_L06N_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
E8|gpio<12>|IOB|IO_L06P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
E9|gpio<14>|IOB|IO_L51N_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
F1||IOB|IO_L22P_7|UNUSED||7|||||||
F10|gpio<4>|IOB|IO_L91P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
F11|gpio<2>|IOB|IO_L94P_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
F12||IOB|IO_L96N_1/GCLK3P|UNUSED||1|||||||
F13|ddr_clk_fb|IOB|IO_L96P_1/GCLK2S|INPUT|SSTL2_I|1||||NONE||LOCATED|
F14||IOB|IO_L24N_1|UNUSED||1|||||||
F15|||VCCO_1|||1|||||2.50||
F16|||VCCO_1|||1|||||2.50||
F17|||VCCINT||||||||1.5||
F18||IOB|IO_L02P_2/VRN_2|UNUSED||2|||||||
F19|gpio<7>|IOB|IO_L19N_2|BIDIR|LVTTL|2|12|SLOW|NONE**|NONE|||
F2||IOB|IO_L22N_7|UNUSED||7|||||||
F20|gpio<31>|IOB|IO_L19P_2|BIDIR|LVTTL|2|12|SLOW|NONE**|NONE|||
F21|gpio<28>|IOB|IO_L21N_2|BIDIR|LVTTL|2|12|SLOW|NONE**|NONE|||
F22||IOB|IO_L21P_2/VREF_2|UNUSED||2|||||||
F3||IOB|IO_L21P_7/VREF_7|UNUSED||7|||||||
F4||IOB|IO_L21N_7|UNUSED||7|||||||
F5||IOB|IO_L19N_7|UNUSED||7|||||||
F6|||VCCINT||||||||1.5||
F7|||VCCO_0|||0|||||3.30||
F8|||VCCO_0|||0|||||3.30||
F9|gpio<3>|IOB|IO_L51P_0/VREF_0|BIDIR|LVTTL|0|12|SLOW|NONE**|NONE||LOCATED|
G1||IOB|IO_L43P_7|UNUSED||7|||||||
G10|||VCCO_0|||0|||||3.30||
G11|||VCCO_0|||0|||||3.30||
G12|||VCCO_1|||1|||||2.50||
G13|||VCCO_1|||1|||||2.50||
G14|||VCCO_1|||1|||||2.50||
G15|||VCCINT||||||||1.5||
G16|||VCCINT||||||||1.5||
G17|||VCCO_2|||2|||||3.30||
G18||IOB|IO_L22N_2|UNUSED||2|||||||
G19|sram_ben<0>|IOB|IO_L24N_2|OUTPUT|LVTTL|2|12|SLOW|NONE**|||LOCATED|
G2||IOB|IO_L43N_7|UNUSED||7|||||||
G20|sram_ben<2>|IOB|IO_L24P_2|OUTPUT|LVTTL|2|12|SLOW|NONE**|||LOCATED|
G21||IOB|IO_L43N_2|UNUSED||2|||||||
G22||IOB|IO_L43P_2|UNUSED||2|||||||
G3||IOB|IO_L24P_7|UNUSED||7|||||||
G4||IOB|IO_L24N_7|UNUSED||7|||||||
G5||IOB|IO_L19P_7|UNUSED||7|||||||
G6|||VCCO_7|||7|||||na||
G7|||VCCINT||||||||1.5||
G8|||VCCINT||||||||1.5||
G9|||VCCO_0|||0|||||3.30||
H1||IOB|IO_L48P_7|UNUSED||7|||||||
H16|||VCCINT||||||||1.5||
H17|||VCCO_2|||2|||||3.30||
H18||IOB|IO_L22P_2|UNUSED||2|||||||
H19|sram_ben<3>|IOB|IO_L45N_2|OUTPUT|LVTTL|2|12|SLOW|NONE**|||LOCATED|
H2||IOB|IO_L48N_7|UNUSED||7|||||||
H20|sram_ben<1>|IOB|IO_L45P_2/VREF_2|OUTPUT|LVTTL|2|12|SLOW|NONE**|||LOCATED|
H21|debug_uart_rx|IOB|IO_L46N_2|INPUT|LVTTL|2||||NONE||LOCATED|
H22|debug_uart_tx|IOB|IO_L46P_2|OUTPUT|LVTTL|2|12|SLOW|NONE**|||LOCATED|
H3||IOB|IO_L46P_7|UNUSED||7|||||||
H4||IOB|IO_L46N_7|UNUSED||7|||||||
H5||IOB|IO_L45N_7|UNUSED||7|||||||
H6|||VCCO_7|||7|||||na||
H7|||VCCINT||||||||1.5||
J1||IOB|IO_L51P_7/VREF_7|UNUSED||7|||||||
J10|||GND||||||||||
J11|||GND||||||||||
J12|||GND||||||||||
J13|||GND||||||||||
J14|||GND||||||||||
J16|||VCCO_2|||2|||||3.30||
J17||IOB|IO_L48N_2|UNUSED||2|||||||
J18||IOB|IO_L48P_2|UNUSED||2|||||||
J19||IOB|IO_L49N_2|UNUSED||2|||||||
J2||IOB|IO_L51N_7|UNUSED||7|||||||
J20||IOB|IO_L49P_2|UNUSED||2|||||||
J21||IOB|IO_L51N_2|UNUSED||2|||||||
J22||IOB|IO_L51P_2/VREF_2|UNUSED||2|||||||
J3||IOB|IO_L49P_7|UNUSED||7|||||||
J4||IOB|IO_L49N_7|UNUSED||7|||||||
J5||IOB|IO_L52N_7|UNUSED||7|||||||
J6||IOB|IO_L45P_7/VREF_7|UNUSED||7|||||||
J7|||VCCO_7|||7|||||na||
J9|||GND||||||||||
K1||IOB|IO_L93P_7/VREF_7|UNUSED||7|||||||
K10|||GND||||||||||
K11|||GND||||||||||
K12|||GND||||||||||
K13|||GND||||||||||
K14|||GND||||||||||
K16|||VCCO_2|||2|||||3.30||
K17||IOB|IO_L52N_2|UNUSED||2|||||||
K18||IOB|IO_L52P_2|UNUSED||2|||||||
K19||IOB|IO_L54N_2|UNUSED||2|||||||
K2||IOB|IO_L93N_7|UNUSED||7|||||||
K20||IOB|IO_L54P_2|UNUSED||2|||||||
K21||IOB|IO_L91N_2|UNUSED||2|||||||
K22||IOB|IO_L91P_2|UNUSED||2|||||||
K3||IOB|IO_L91P_7|UNUSED||7|||||||
K4||IOB|IO_L91N_7|UNUSED||7|||||||
K5||IOB|IO_L52P_7|UNUSED||7|||||||
K6||IOB|IO_L54N_7|UNUSED||7|||||||
K7|||VCCO_7|||7|||||na||
K9|||GND||||||||||
L1|||VCCAUX||||||||||
L10|||GND||||||||||
L11|||GND||||||||||
L12|||GND||||||||||
L13|||GND||||||||||
L14|||GND||||||||||
L16|||VCCO_2|||2|||||3.30||
L17||IOB|IO_L93N_2|UNUSED||2|||||||
L18||IOB|IO_L93P_2/VREF_2|UNUSED||2|||||||
L19||IOB|IO_L94N_2|UNUSED||2|||||||
L2||IOB|IO_L96P_7|UNUSED||7|||||||
L20||IOB|IO_L94P_2|UNUSED||2|||||||
L21|sram_addr<31>|IOB|IO_L96N_2|OUTPUT|LVTTL|2|12|SLOW|NONE**||||
L22|sram_addr<30>|IOB|IO_L96P_2|OUTPUT|LVTTL|2|12|SLOW|NONE**||||
L3||IOB|IO_L96N_7|UNUSED||7|||||||
L4||IOB|IO_L94P_7|UNUSED||7|||||||
L5||IOB|IO_L94N_7|UNUSED||7|||||||
L6||IOB|IO_L54P_7|UNUSED||7|||||||
L7|||VCCO_7|||7|||||na||
L9|||GND||||||||||
M1||IOB|IO_L96N_6|UNUSED||6|||||||
M10|||GND||||||||||
M11|||GND||||||||||
M12|||GND||||||||||
M13|||GND||||||||||
M14|||GND||||||||||
M16|||VCCO_3|||3|||||2.50||
M17||IOB|IO_L93N_3/VREF_3|||3|||||1.25||
M18|ddr_addr<5>|IOB|IO_L94P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
M19|ddr_addr<4>|IOB|IO_L94N_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
M2||IOB|IO_L96P_6|UNUSED||6|||||||
M20|ddr_addr<3>|IOB|IO_L96P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
M21|ddr_bankaddr<1>|IOB|IO_L96N_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
M22|||VCCAUX||||||||||
M3||IOB|IO_L94N_6|UNUSED||6|||||||
M4||IOB|IO_L94P_6|UNUSED||6|||||||
M5||IOB|IO_L93N_6/VREF_6|UNUSED||6|||||||
M6||IOB|IO_L93P_6|UNUSED||6|||||||
M7|||VCCO_6|||6|||||na||
M9|||GND||||||||||
N1||IOB|IO_L91N_6|UNUSED||6|||||||
N10|||GND||||||||||
N11|||GND||||||||||
N12|||GND||||||||||
N13|||GND||||||||||
N14|||GND||||||||||
N16|||VCCO_3|||3|||||2.50||
N17|ddr_addr<8>|IOB|IO_L93P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
N18|ddr_addr<1>|IOB|IO_L52N_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
N19|ddr_clke|IOB|IO_L54P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
N2||IOB|IO_L91P_6|UNUSED||6|||||||
N20|ddr_addr<0>|IOB|IO_L54N_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
N21|ddr_rasn|IOB|IO_L91P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
N22|ddr_csn|IOB|IO_L91N_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
N3||IOB|IO_L54N_6|UNUSED||6|||||||
N4||IOB|IO_L54P_6|UNUSED||6|||||||
N5||IOB|IO_L52N_6|UNUSED||6|||||||
N6||IOB|IO_L52P_6|UNUSED||6|||||||
N7|||VCCO_6|||6|||||na||
N9|||GND||||||||||
P1||IOB|IO_L51N_6/VREF_6|UNUSED||6|||||||
P10|||GND||||||||||
P11|||GND||||||||||
P12|||GND||||||||||
P13|||GND||||||||||
P14|||GND||||||||||
P16|||VCCO_3|||3|||||2.50||
P17|ddr_addr<6>|IOB|IO_L45P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
P18|ddr_addr<7>|IOB|IO_L52P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
P19|ddr_dqs<0>|IOB|IO_L49P_3|BIDIR|SSTL2_I|3|12*|SLOW*|PULLDOWN|NONE||LOCATED|
P2||IOB|IO_L51P_6|UNUSED||6|||||||
P20|ddr_dqs<1>|IOB|IO_L49N_3|BIDIR|SSTL2_I|3|12*|SLOW*|PULLDOWN|NONE||LOCATED|
P21|ddr_casn|IOB|IO_L51P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
P22||IOB|IO_L51N_3/VREF_3|||3|||||1.25||
P3||IOB|IO_L49N_6|UNUSED||6|||||||
P4||IOB|IO_L49P_6|UNUSED||6|||||||
P5||IOB|IO_L48N_6|UNUSED||6|||||||
P6||IOB|IO_L48P_6|UNUSED||6|||||||
P7|||VCCO_6|||6|||||na||
P9|||GND||||||||||
R1||IOB|IO_L46N_6|UNUSED||6|||||||
R16|||VCCINT||||||||1.5||
R17|||VCCO_3|||3|||||2.50||
R18||IOB|IO_L45N_3/VREF_3|||3|||||1.25||
R19|ddr_dq<6>|IOB|IO_L46P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
R2||IOB|IO_L46P_6|UNUSED||6|||||||
R20|ddr_dq<7>|IOB|IO_L46N_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
R21|ddr_dqm<1>|IOB|IO_L48P_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
R22|ddr_wen|IOB|IO_L48N_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
R3||IOB|IO_L45N_6/VREF_6|UNUSED||6|||||||
R4||IOB|IO_L45P_6|UNUSED||6|||||||
R5||IOB|IO_L22N_6|UNUSED||6|||||||
R6|||VCCO_6|||6|||||na||
R7|||VCCINT||||||||1.5||
T1||IOB|IO_L43N_6|UNUSED||6|||||||
T10|||VCCO_5|||5|||||3.30||
T11|||VCCO_5|||5|||||3.30||
T12|||VCCO_4|||4|||||3.30||
T13|||VCCO_4|||4|||||3.30||
T14|||VCCO_4|||4|||||3.30||
T15|||VCCINT||||||||1.5||
T16|||VCCINT||||||||1.5||
T17|||VCCO_3|||3|||||2.50||
T18||IOB|IO_L19N_3|UNUSED||3|||||||
T19|ddr_dq<4>|IOB|IO_L24P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
T2||IOB|IO_L43P_6|UNUSED||6|||||||
T20|ddr_dq<5>|IOB|IO_L24N_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
T21|ddr_dq<8>|IOB|IO_L43P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
T22|ddr_dqm<0>|IOB|IO_L43N_3|OUTPUT|SSTL2_I|3|12*|SLOW*|NONE**|||LOCATED|
T3||IOB|IO_L24N_6|UNUSED||6|||||||
T4||IOB|IO_L24P_6|UNUSED||6|||||||
T5||IOB|IO_L22P_6|UNUSED||6|||||||
T6|||VCCO_6|||6|||||na||
T7|||VCCINT||||||||1.5||
T8|||VCCINT||||||||1.5||
T9|||VCCO_5|||5|||||3.30||
U1||IOB|IO_L21N_6/VREF_6|UNUSED||6|||||||
U10|sram_data<5>|IOB|IO_L94P_5/VREF_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
U11|sram_data<12>|IOB|IO_L94N_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
U12|sram_data<3>|IOB|IO_L94N_4/VREF_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
U13|sram_data<8>|IOB|IO_L91N_4/VREF_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
U14|sram_data<30>|IOB|IO_L51N_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
U15|||VCCO_4|||4|||||3.30||
U16|||VCCO_4|||4|||||3.30||
U17|||VCCINT||||||||1.5||
U18||IOB|IO_L19P_3|UNUSED||3|||||||
U19|ddr_dq<3>|IOB|IO_L21P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
U2||IOB|IO_L21P_6|UNUSED||6|||||||
U20||IOB|IO_L21N_3/VREF_3|||3|||||1.25||
U21|ddr_dq<10>|IOB|IO_L22P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
U22|ddr_dq<9>|IOB|IO_L22N_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
U3||IOB|IO_L06N_6|UNUSED||6|||||||
U4||IOB|IO_L06P_6|UNUSED||6|||||||
U5||IOB|IO_L01N_6|UNUSED||6|||||||
U6|||VCCINT||||||||1.5||
U7|||VCCO_5|||5|||||3.30||
U8|||VCCO_5|||5|||||3.30||
U9|sram_data<6>|IOB|IO_L24N_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
V1||IOB|IO_L19N_6|UNUSED||6|||||||
V10|sram_cen<1>|IOB|IO_L91N_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
V11|sram_addr<3>|IOB|IO_L95P_5/GCLK4P|OUTPUT|LVTTL|5|12|SLOW|NONE**||||
V12|sram_data<23>|IOB|IO_L94P_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
V13|sram_data<17>|IOB|IO_L91P_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
V14|sram_oen|IOB|IO_L51P_4/VREF_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
V15|sram_addr<6>|IOB|IO_L19P_4|OUTPUT|LVTTL|4|12|SLOW|NONE**||||
V16|sram_data<20>|IOB|IO_L19N_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
V17||IOB|IO_L02P_4/D1|UNUSED||4|||||||
V18||IOB|IO_L02N_4/D0|UNUSED||4|||||||
V19|ddr_dq<1>|IOB|IO_L04P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
V2||IOB|IO_L19P_6|UNUSED||6|||||||
V20|ddr_dq<2>|IOB|IO_L04N_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
V21|ddr_dq<12>|IOB|IO_L06P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
V22|ddr_dq<11>|IOB|IO_L06N_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
V3||IOB|IO_L03N_6/VREF_6|UNUSED||6|||||||
V4||IOB|IO_L03P_6|UNUSED||6|||||||
V5||IOB|IO_L01P_6|UNUSED||6|||||||
V6||IOB|IO_L05P_5/VRN_5|UNUSED||5|||||||
V7|sram_addr<23>|IOB|IO_L05N_5/VRP_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
V8|sram_addr<27>|IOB|IO_L24P_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
V9|sram_addr<25>|IOB|IO_L91P_5/VREF_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
W1||IOB|IO_L04N_6|UNUSED||6|||||||
W10|sram_data<1>|IOB|IO_L92P_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
W11|sram_addr<2>|IOB|IO_L95N_5/GCLK5S|OUTPUT|LVTTL|5|12|SLOW|NONE**||||
W12|sram_data<21>|IOB|IO_L95N_4/GCLK3S|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
W13|sram_addr<13>|IOB|IO_L92N_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
W14|sram_addr<14>|IOB|IO_L52N_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
W15|sram_data<29>|IOB|IO_L24N_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
W16|sram_data<24>|IOB|IO_L21N_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
W17|sram_addr<7>|IOB|IO_L05N_4/VRP_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
W18||IOB|IO_L03N_4/D2/ALT_VRP_4|UNUSED||4|||||||
W19|||GND||||||||||
W2||IOB|IO_L04P_6|UNUSED||6|||||||
W20|ddr_dq<0>|IOB|IO_L01N_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
W21|ddr_dq<13>|IOB|IO_L03P_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
W22||IOB|IO_L03N_3/VREF_3|||3|||||1.25||
W3|||M1||||||||||
W4|||GND||||||||||
W5||IOB|IO_L03P_5/D5/ALT_VRN_5|UNUSED||5|||||||
W6|sram_addr<9>|IOB|IO_L06P_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
W7|sram_addr<26>|IOB|IO_L21P_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
W8|sram_addr<29>|IOB|IO_L49P_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
W9|sram_data<13>|IOB|IO_L52P_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
Y1||IOB|IO_L02N_6/VRP_6|UNUSED||6|||||||
Y10|sram_data<0>|IOB|IO_L92N_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
Y11|sram_addr<1>|IOB|IO_L96P_5/GCLK6P|OUTPUT|LVTTL|5|12|SLOW|NONE**||||
Y12|sram_data<28>|IOB|IO_L95P_4/GCLK2P|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
Y13|sram_data<18>|IOB|IO_L92P_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
Y14|sram_addr<19>|IOB|IO_L52P_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
Y15|sram_addr<18>|IOB|IO_L24P_4|OUTPUT|LVTTL|4|12|SLOW|NONE**|||LOCATED|
Y16|sram_data<27>|IOB|IO_L21P_4/VREF_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
Y17|sram_data<25>|IOB|IO_L05P_4/VRN_4|BIDIR|LVTTL|4|12|SLOW|NONE**|NONE||LOCATED|
Y18||IOB|IO_L03P_4/D3/ALT_VRN_4|UNUSED||4|||||||
Y19|||CCLK||||||||||
Y2||IOB|IO_L02P_6/VRN_6|UNUSED||6|||||||
Y20|||GND||||||||||
Y21|ddr_dq<15>|IOB|IO_L02P_3/VRN_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
Y22|ddr_dq<14>|IOB|IO_L02N_3/VRP_3|BIDIR|SSTL2_I|3|12*|SLOW*|NONE**|NONE||LOCATED|
Y3|||GND||||||||||
Y4||IOB|IO_L01N_5/RDWR_B|UNUSED||5|||||||
Y5||IOB|IO_L03N_5/D4/ALT_VRP_5|UNUSED||5|||||||
Y6|sram_addr<11>|IOB|IO_L06N_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
Y7|sram_addr<12>|IOB|IO_L21N_5/VREF_5|OUTPUT|LVTTL|5|12|SLOW|NONE**|||LOCATED|
Y8|sram_data<15>|IOB|IO_L49N_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|
Y9|sram_data<11>|IOB|IO_L52N_5|BIDIR|LVTTL|5|12|SLOW|NONE**|NONE||LOCATED|

-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|

* Default value.
** This default Pullup/Pulldown value can be overridden in Bitgen.


#
#To preserve the pinout above for future design iterations,
#In Project Navigator simply execute the "Back-annotate Pin
#Location" process located under the "Place-and-Route" Process,
#or invoke PIN2UCF from the command line. The location constraints
#will be written into your specified UCF file. (The constraints
#listed below are in PCF format and cannot be directly used
#in the UCF file).
#
COMP "ddr_bankaddr<0>" LOCATE = SITE "B19" ; 
COMP "ddr_bankaddr<1>" LOCATE = SITE "M21" ; 
COMP "ddr_dq<0>" LOCATE = SITE "W20" ; 
COMP "ddr_dq<1>" LOCATE = SITE "V19" ; 
COMP "ddr_dq<2>" LOCATE = SITE "V20" ; 
COMP "ddr_dq<3>" LOCATE = SITE "U19" ; 
COMP "ddr_dq<4>" LOCATE = SITE "T19" ; 
COMP "ddr_dq<5>" LOCATE = SITE "T20" ; 
COMP "ddr_dq<6>" LOCATE = SITE "R19" ; 
COMP "ddr_dq<7>" LOCATE = SITE "R20" ; 
COMP "ddr_dq<8>" LOCATE = SITE "T21" ; 
COMP "ddr_dq<9>" LOCATE = SITE "U22" ; 
COMP "ddr_clk" LOCATE = SITE "D12" ; 
COMP "ddr_csn" LOCATE = SITE "N22" ; 
COMP "ddr_wen" LOCATE = SITE "R22" ; 
COMP "gpio<0>" LOCATE = SITE "D9" ; 
COMP "gpio<1>" LOCATE = SITE "C9" ; 
COMP "gpio<2>" LOCATE = SITE "F11" ; 
COMP "gpio<3>" LOCATE = SITE "F9" ; 
COMP "gpio<4>" LOCATE = SITE "F10" ; 
COMP "gpio<5>" LOCATE = SITE "D10" ; 
COMP "gpio<6>" LOCATE = SITE "C10" ; 
COMP "gpio<7>" LOCATE = SITE "F19" ; 
COMP "gpio<8>" LOCATE = SITE "B9" ; 
COMP "gpio<9>" LOCATE = SITE "A8" ; 
COMP "ddr_dq<10>" LOCATE = SITE "U21" ; 
COMP "ddr_dq<11>" LOCATE = SITE "V22" ; 
COMP "ddr_dq<12>" LOCATE = SITE "V21" ; 
COMP "ddr_dq<13>" LOCATE = SITE "W21" ; 
COMP "ddr_dq<14>" LOCATE = SITE "Y22" ; 
COMP "ddr_dq<15>" LOCATE = SITE "Y21" ; 
COMP "ext_clk" LOCATE = SITE "B11" ; 
COMP "ddr_dqm<0>" LOCATE = SITE "T22" ; 
COMP "ddr_dqm<1>" LOCATE = SITE "R21" ; 
COMP "ddr_dqs<0>" LOCATE = SITE "P19" ; 
COMP "ddr_dqs<1>" LOCATE = SITE "P20" ; 
COMP "ddr_clk_fb" LOCATE = SITE "F13" ; 
COMP "sram_addr<0>" LOCATE = SITE "AA11" ; 
COMP "sram_addr<1>" LOCATE = SITE "Y11" ; 
COMP "sram_addr<2>" LOCATE = SITE "W11" ; 
COMP "sram_addr<3>" LOCATE = SITE "V11" ; 
COMP "sram_addr<4>" LOCATE = SITE "AB10" ; 
COMP "sram_addr<5>" LOCATE = SITE "AA10" ; 
COMP "sram_addr<6>" LOCATE = SITE "V15" ; 
COMP "sram_addr<7>" LOCATE = SITE "W17" ; 
COMP "sram_addr<8>" LOCATE = SITE "AA15" ; 
COMP "sram_addr<9>" LOCATE = SITE "W6" ; 
COMP "sram_data<0>" LOCATE = SITE "Y10" ; 
COMP "sram_data<1>" LOCATE = SITE "W10" ; 
COMP "sram_data<2>" LOCATE = SITE "AA9" ; 
COMP "sram_data<3>" LOCATE = SITE "U12" ; 
COMP "sram_data<4>" LOCATE = SITE "AA8" ; 
COMP "sram_data<5>" LOCATE = SITE "U10" ; 
COMP "sram_data<6>" LOCATE = SITE "U9" ; 
COMP "sram_data<7>" LOCATE = SITE "AB7" ; 
COMP "sram_data<8>" LOCATE = SITE "U13" ; 
COMP "sram_data<9>" LOCATE = SITE "AB9" ; 
COMP "ddr_addr<10>" LOCATE = SITE "B17" ; 
COMP "ddr_addr<11>" LOCATE = SITE "A18" ; 
COMP "ddr_addr<12>" LOCATE = SITE "B18" ; 
COMP "sys_rst" LOCATE = SITE "B4" ; 
COMP "ddr_casn" LOCATE = SITE "P21" ; 
COMP "ddr_clke" LOCATE = SITE "N19" ; 
COMP "ddr_clkn" LOCATE = SITE "E12" ; 
COMP "ddr_rasn" LOCATE = SITE "N21" ; 
COMP "console_uart_rx" LOCATE = SITE "B7" ; 
COMP "console_uart_tx" LOCATE = SITE "A7" ; 
COMP "gpio<10>" LOCATE = SITE "B8" ; 
COMP "gpio<11>" LOCATE = SITE "E7" ; 
COMP "gpio<20>" LOCATE = SITE "C5" ; 
COMP "gpio<12>" LOCATE = SITE "E8" ; 
COMP "gpio<21>" LOCATE = SITE "C4" ; 
COMP "gpio<13>" LOCATE = SITE "E10" ; 
COMP "gpio<30>" LOCATE = SITE "D11" ; 
COMP "gpio<22>" LOCATE = SITE "A4" ; 
COMP "gpio<14>" LOCATE = SITE "E9" ; 
COMP "gpio<31>" LOCATE = SITE "F20" ; 
COMP "gpio<23>" LOCATE = SITE "A10" ; 
COMP "gpio<15>" LOCATE = SITE "A9" ; 
COMP "gpio<24>" LOCATE = SITE "E20" ; 
COMP "gpio<16>" LOCATE = SITE "C6" ; 
COMP "gpio<25>" LOCATE = SITE "E21" ; 
COMP "gpio<17>" LOCATE = SITE "D6" ; 
COMP "gpio<26>" LOCATE = SITE "E19" ; 
COMP "gpio<18>" LOCATE = SITE "A5" ; 
COMP "gpio<27>" LOCATE = SITE "E22" ; 
COMP "gpio<19>" LOCATE = SITE "B5" ; 
COMP "gpio<28>" LOCATE = SITE "F21" ; 
COMP "gpio<29>" LOCATE = SITE "C11" ; 
COMP "sram_ben<0>" LOCATE = SITE "G19" ; 
COMP "sram_ben<1>" LOCATE = SITE "H20" ; 
COMP "sram_ben<2>" LOCATE = SITE "G20" ; 
COMP "sram_ben<3>" LOCATE = SITE "H19" ; 
COMP "sram_cen<0>" LOCATE = SITE "AB12" ; 
COMP "sram_cen<1>" LOCATE = SITE "V10" ; 
COMP "ddr_addr<0>" LOCATE = SITE "N20" ; 
COMP "ddr_addr<1>" LOCATE = SITE "N18" ; 
COMP "ddr_addr<2>" LOCATE = SITE "A19" ; 
COMP "ddr_addr<3>" LOCATE = SITE "M20" ; 
COMP "ddr_addr<4>" LOCATE = SITE "M19" ; 
COMP "ddr_addr<5>" LOCATE = SITE "M18" ; 
COMP "ddr_addr<6>" LOCATE = SITE "P17" ; 
COMP "ddr_addr<7>" LOCATE = SITE "P18" ; 
COMP "ddr_addr<8>" LOCATE = SITE "N17" ; 
COMP "ddr_addr<9>" LOCATE = SITE "A17" ; 
COMP "sram_addr<10>" LOCATE = SITE "AA16" ; 
COMP "sram_addr<11>" LOCATE = SITE "Y6" ; 
COMP "sram_addr<20>" LOCATE = SITE "AA17" ; 
COMP "sram_addr<12>" LOCATE = SITE "Y7" ; 
COMP "sram_addr<21>" LOCATE = SITE "AB18" ; 
COMP "sram_addr<13>" LOCATE = SITE "W13" ; 
COMP "sram_addr<30>" LOCATE = SITE "L22" ; 
COMP "sram_addr<22>" LOCATE = SITE "AB5" ; 
COMP "sram_addr<14>" LOCATE = SITE "W14" ; 
COMP "sram_addr<31>" LOCATE = SITE "L21" ; 
COMP "sram_addr<23>" LOCATE = SITE "V7" ; 
COMP "sram_addr<15>" LOCATE = SITE "AB15" ; 
COMP "sram_addr<24>" LOCATE = SITE "AA6" ; 
COMP "sram_addr<16>" LOCATE = SITE "AB17" ; 
COMP "sram_addr<25>" LOCATE = SITE "V9" ; 
COMP "sram_addr<17>" LOCATE = SITE "AB16" ; 
COMP "sram_addr<26>" LOCATE = SITE "W7" ; 
COMP "sram_addr<18>" LOCATE = SITE "Y15" ; 
COMP "sram_addr<27>" LOCATE = SITE "V8" ; 
COMP "sram_addr<19>" LOCATE = SITE "Y14" ; 
COMP "sram_addr<28>" LOCATE = SITE "AB6" ; 
COMP "sram_addr<29>" LOCATE = SITE "W8" ; 
COMP "sram_oen" LOCATE = SITE "V14" ; 
COMP "sram_wen" LOCATE = SITE "AA5" ; 
COMP "sram_rst" LOCATE = SITE "E18" ; 
COMP "sram_data<10>" LOCATE = SITE "AB8" ; 
COMP "sram_data<11>" LOCATE = SITE "Y9" ; 
COMP "sram_data<20>" LOCATE = SITE "V16" ; 
COMP "sram_data<12>" LOCATE = SITE "U11" ; 
COMP "sram_data<21>" LOCATE = SITE "W12" ; 
COMP "sram_data<13>" LOCATE = SITE "W9" ; 
COMP "sram_data<30>" LOCATE = SITE "U14" ; 
COMP "sram_data<22>" LOCATE = SITE "AB13" ; 
COMP "sram_data<14>" LOCATE = SITE "AA7" ; 
COMP "sram_data<31>" LOCATE = SITE "AA12" ; 
COMP "sram_data<23>" LOCATE = SITE "V12" ; 
COMP "sram_data<15>" LOCATE = SITE "Y8" ; 
COMP "sram_data<24>" LOCATE = SITE "W16" ; 
COMP "sram_data<16>" LOCATE = SITE "AA14" ; 
COMP "sram_data<25>" LOCATE = SITE "Y17" ; 
COMP "sram_data<17>" LOCATE = SITE "V13" ; 
COMP "sram_data<26>" LOCATE = SITE "AA13" ; 
COMP "sram_data<18>" LOCATE = SITE "Y13" ; 
COMP "sram_data<27>" LOCATE = SITE "Y16" ; 
COMP "sram_data<19>" LOCATE = SITE "AB14" ; 
COMP "sram_data<28>" LOCATE = SITE "Y12" ; 
COMP "sram_data<29>" LOCATE = SITE "W15" ; 
COMP "debug_uart_rx" LOCATE = SITE "H21" ; 
COMP "debug_uart_tx" LOCATE = SITE "H22" ; 
#

Release 5.2.02i - Par F.30a
Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.


JWILLIAMS::  Thu Jul 24 08:39:23 2003


par -w -ol 2 -d 0 system_map.ncd system.ncd system.pcf 

WARNING:Par:266 - 
   The "-d" switch has been obsoleted. This switch will be ignored.


Constraints file: system.pcf

Loading device database for application par from file "system_map.ncd".
   "system" is an NCD, version 2.37, device xc2v1000, package fg456, speed -4
Loading device for application par from file '2v1000.nph' in environment
C:/Xilinx.
The STEPPING level for this design is 0.
Device speed data version:  PRODUCTION 1.114 2002-12-13.


Resolved that IOB <ddr_bankaddr<0>> must be placed at site B19.
Resolved that IOB <ddr_bankaddr<1>> must be placed at site M21.
Resolved that IOB <ddr_dq<0>> must be placed at site W20.
Resolved that IOB <ddr_dq<1>> must be placed at site V19.
Resolved that IOB <ddr_dq<2>> must be placed at site V20.
Resolved that IOB <ddr_dq<3>> must be placed at site U19.
Resolved that IOB <ddr_dq<4>> must be placed at site T19.
Resolved that IOB <ddr_dq<5>> must be placed at site T20.
Resolved that IOB <ddr_dq<6>> must be placed at site R19.
Resolved that IOB <ddr_dq<7>> must be placed at site R20.
Resolved that IOB <ddr_dq<8>> must be placed at site T21.
Resolved that IOB <ddr_dq<9>> must be placed at site U22.
Resolved that IOB <ddr_clk> must be placed at site D12.
Resolved that IOB <ddr_csn> must be placed at site N22.
Resolved that IOB <ddr_wen> must be placed at site R22.
Resolved that IOB <gpio<0>> must be placed at site D9.
Resolved that IOB <gpio<1>> must be placed at site C9.
Resolved that IOB <gpio<2>> must be placed at site F11.
Resolved that IOB <gpio<3>> must be placed at site F9.
Resolved that IOB <gpio<4>> must be placed at site F10.
Resolved that IOB <gpio<5>> must be placed at site D10.
Resolved that IOB <gpio<6>> must be placed at site C10.
Resolved that IOB <gpio<8>> must be placed at site B9.
Resolved that IOB <gpio<9>> must be placed at site A8.
Resolved that IOB <ddr_dq<10>> must be placed at site U21.
Resolved that IOB <ddr_dq<11>> must be placed at site V22.
Resolved that IOB <ddr_dq<12>> must be placed at site V21.
Resolved that IOB <ddr_dq<13>> must be placed at site W21.
Resolved that IOB <ddr_dq<14>> must be placed at site Y22.
Resolved that IOB <ddr_dq<15>> must be placed at site Y21.
Resolved that IOB <ext_clk> must be placed at site B11.
Resolved that IOB <ddr_dqm<0>> must be placed at site T22.
Resolved that IOB <ddr_dqm<1>> must be placed at site R21.
Resolved that IOB <ddr_dqs<0>> must be placed at site P19.
Resolved that IOB <ddr_dqs<1>> must be placed at site P20.
Resolved that IOB <ddr_clk_fb> must be placed at site F13.
Resolved that IOB <sram_addr<7>> must be placed at site W17.
Resolved that IOB <sram_addr<8>> must be placed at site AA15.
Resolved that IOB <sram_addr<9>> must be placed at site W6.
Resolved that IOB <sram_data<0>> must be placed at site Y10.
Resolved that IOB <sram_data<1>> must be placed at site W10.
Resolved that IOB <sram_data<2>> must be placed at site AA9.
Resolved that IOB <sram_data<3>> must be placed at site U12.
Resolved that IOB <sram_data<4>> must be placed at site AA8.
Resolved that IOB <sram_data<5>> must be placed at site U10.
Resolved that IOB <sram_data<6>> must be placed at site U9.
Resolved that IOB <sram_data<7>> must be placed at site AB7.
Resolved that IOB <sram_data<8>> must be placed at site U13.
Resolved that IOB <sram_data<9>> must be placed at site AB9.
Resolved that IOB <ddr_addr<10>> must be placed at site B17.
Resolved that IOB <ddr_addr<11>> must be placed at site A18.
Resolved that IOB <ddr_addr<12>> must be placed at site B18.
Resolved that IOB <sys_rst> must be placed at site B4.
Resolved that IOB <ddr_casn> must be placed at site P21.
Resolved that IOB <ddr_clke> must be placed at site N19.
Resolved that IOB <ddr_clkn> must be placed at site E12.
Resolved that IOB <ddr_rasn> must be placed at site N21.
Resolved that IOB <console_uart_rx> must be placed at site B7.
Resolved that IOB <console_uart_tx> must be placed at site A7.
Resolved that IOB <gpio<10>> must be placed at site B8.
Resolved that IOB <gpio<11>> must be placed at site E7.
Resolved that IOB <gpio<20>> must be placed at site C5.
Resolved that IOB <gpio<12>> must be placed at site E8.
Resolved that IOB <gpio<21>> must be placed at site C4.
Resolved that IOB <gpio<13>> must be placed at site E10.
Resolved that IOB <gpio<22>> must be placed at site A4.
Resolved that IOB <gpio<14>> must be placed at site E9.
Resolved that IOB <gpio<15>> must be placed at site A9.
Resolved that IOB <gpio<16>> must be placed at site C6.
Resolved that IOB <gpio<17>> must be placed at site D6.
Resolved that IOB <gpio<18>> must be placed at site A5.
Resolved that IOB <gpio<19>> must be placed at site B5.
Resolved that IOB <sram_ben<0>> must be placed at site G19.
Resolved that IOB <sram_ben<1>> must be placed at site H20.
Resolved that IOB <sram_ben<2>> must be placed at site G20.
Resolved that IOB <sram_ben<3>> must be placed at site H19.
Resolved that IOB <sram_cen<0>> must be placed at site AB12.
Resolved that IOB <sram_cen<1>> must be placed at site V10.
Resolved that IOB <ddr_addr<0>> must be placed at site N20.
Resolved that IOB <ddr_addr<1>> must be placed at site N18.
Resolved that IOB <ddr_addr<2>> must be placed at site A19.
Resolved that IOB <ddr_addr<3>> must be placed at site M20.
Resolved that IOB <ddr_addr<4>> must be placed at site M19.
Resolved that IOB <ddr_addr<5>> must be placed at site M18.
Resolved that IOB <ddr_addr<6>> must be placed at site P17.
Resolved that IOB <ddr_addr<7>> must be placed at site P18.
Resolved that IOB <ddr_addr<8>> must be placed at site N17.
Resolved that IOB <ddr_addr<9>> must be placed at site A17.
Resolved that IOB <sram_addr<10>> must be placed at site AA16.
Resolved that IOB <sram_addr<11>> must be placed at site Y6.
Resolved that IOB <sram_addr<20>> must be placed at site AA17.
Resolved that IOB <sram_addr<12>> must be placed at site Y7.
Resolved that IOB <sram_addr<21>> must be placed at site AB18.
Resolved that IOB <sram_addr<13>> must be placed at site W13.
Resolved that IOB <sram_addr<22>> must be placed at site AB5.
Resolved that IOB <sram_addr<14>> must be placed at site W14.
Resolved that IOB <sram_addr<23>> must be placed at site V7.
Resolved that IOB <sram_addr<15>> must be placed at site AB15.
Resolved that IOB <sram_addr<24>> must be placed at site AA6.
Resolved that IOB <sram_addr<16>> must be placed at site AB17.
Resolved that IOB <sram_addr<25>> must be placed at site V9.
Resolved that IOB <sram_addr<17>> must be placed at site AB16.
Resolved that IOB <sram_addr<26>> must be placed at site W7.
Resolved that IOB <sram_addr<18>> must be placed at site Y15.
Resolved that IOB <sram_addr<27>> must be placed at site V8.
Resolved that IOB <sram_addr<19>> must be placed at site Y14.
Resolved that IOB <sram_addr<28>> must be placed at site AB6.
Resolved that IOB <sram_addr<29>> must be placed at site W8.
Resolved that IOB <sram_oen> must be placed at site V14.
Resolved that IOB <sram_wen> must be placed at site AA5.
Resolved that IOB <sram_rst> must be placed at site E18.
Resolved that IOB <sram_data<10>> must be placed at site AB8.
Resolved that IOB <sram_data<11>> must be placed at site Y9.
Resolved that IOB <sram_data<20>> must be placed at site V16.
Resolved that IOB <sram_data<12>> must be placed at site U11.
Resolved that IOB <sram_data<21>> must be placed at site W12.
Resolved that IOB <sram_data<13>> must be placed at site W9.
Resolved that IOB <sram_data<30>> must be placed at site U14.
Resolved that IOB <sram_data<22>> must be placed at site AB13.
Resolved that IOB <sram_data<14>> must be placed at site AA7.
Resolved that IOB <sram_data<31>> must be placed at site AA12.
Resolved that IOB <sram_data<23>> must be placed at site V12.
Resolved that IOB <sram_data<15>> must be placed at site Y8.
Resolved that IOB <sram_data<24>> must be placed at site W16.
Resolved that IOB <sram_data<16>> must be placed at site AA14.
Resolved that IOB <sram_data<25>> must be placed at site Y17.
Resolved that IOB <sram_data<17>> must be placed at site V13.
Resolved that IOB <sram_data<26>> must be placed at site AA13.
Resolved that IOB <sram_data<18>> must be placed at site Y13.
Resolved that IOB <sram_data<27>> must be placed at site Y16.
Resolved that IOB <sram_data<19>> must be placed at site AB14.
Resolved that IOB <sram_data<28>> must be placed at site Y12.
Resolved that IOB <sram_data<29>> must be placed at site W15.
Resolved that IOB <debug_uart_rx> must be placed at site H21.
Resolved that IOB <debug_uart_tx> must be placed at site H22.


Device utilization summary:

   Number of External IOBs           154 out of 324    47%
      Number of LOCed External IOBs  135 out of 154    87%

   Number of MULT18X18s                3 out of 40      7%
   Number of RAMB16s                   4 out of 40     10%
   Number of SLICEs                 1706 out of 5120   33%

   Number of BUFGMUXs                  7 out of 16     43%
   Number of DCMs                      3 out of 8      37%



Overall effort level (-ol):   2 (set by user)
Placer effort level (-pl):    2 (set by user)
Placer cost table entry (-t): 1
Router effort level (-rl):    2 (set by user)

Starting initial Timing Analysis.  REAL time: 5 secs 
Finished initial Timing Analysis.  REAL time: 9 secs 

WARNING:Par:276 - The signal
   microblaze/microblaze_0_i/decode_i/prefetch_buffer_i/buffer_addr_muxcy_l1/O
   has no load
WARNING:Par:276 - The signal
   microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i0/muxcy_x/O has no
   load
WARNING:Par:276 - The signal
   microblaze/microblaze_0_i/data_flow_i/div_unit_i1/new_q_muxcy_l0/O has no
   load
WARNING:Par:276 - The signal
   microblaze/microblaze_0_i/data_flow_i/div_unit_i1/d_muxcy_l0/O has no load

Phase 1.1
Phase 1.1 (Checksum:98dc2b) REAL time: 10 secs 

Phase 3.23
......................
Phase 3.23 (Checksum:989736) REAL time: 38 secs 

Phase 4.3
Phase 4.3 (Checksum:26259fc) REAL time: 38 secs 

Phase 6.5
Phase 6.5 (Checksum:39386fa) REAL time: 38 secs 

Phase 7.8
........................................
......
Phase 7.8 (Checksum:e26092) REAL time: 54 secs 

Phase 8.5
Phase 8.5 (Checksum:4c4b3f8) REAL time: 54 secs 

Phase 9.18
Phase 9.18 (Checksum:55d4a77) REAL time: 1 mins 

Phase 10.24
Phase 10.24 (Checksum:5f5e0f6) REAL time: 1 mins 

Writing design to file system.ncd.

Total REAL time to placer completion: 1 mins 2 secs 
Total CPU time to placer completion: 57 secs 


Starting Router          REAL time: 1 mins 3 secs 

Phase 1: 16008 unrouted;       REAL time: 1 mins 9 secs 

Phase 2: 14069 unrouted;       REAL time: 1 mins 11 secs 

Phase 3: 4633 unrouted; (0)      REAL time: 1 mins 20 secs 

Phase 4: 4633 unrouted; (0)      REAL time: 1 mins 22 secs 

Phase 5: 4633 unrouted; (0)      REAL time: 1 mins 23 secs 

Phase 6: 0 unrouted; (0)      REAL time: 1 mins 48 secs 

Finished Router          REAL time: 1 mins 48 secs 

Total REAL time to router completion: 1 mins 50 secs 
Total CPU time to router completion: 1 mins 44 secs 

Generating "par" statistics.

**************************
Generating Clock Report
**************************

+----------------------------+----------+--------+------------+-------------+
|         Clock Net          | Resource | Fanout |Max Skew(ns)|Max Delay(ns)|
+----------------------------+----------+--------+------------+-------------+
|   conn_0_bram_clk          |  Global  | 1211   |  0.264     |  1.188      |
+----------------------------+----------+--------+------------+-------------+
|        ddr_clk_90          |  Global  |   84   |  0.174     |  1.181      |
+----------------------------+----------+--------+------------+-------------+
|        sys_clk_90          |  Global  |    8   |  0.076     |  1.007      |
+----------------------------+----------+--------+------------+-------------+


   The Delay Summary Report

   The Score for this design is: 233


The Number of signals not completely routed for this design is: 0

   The Average Connection Delay for this design is:        1.382 ns
   The Maximum Pin Delay is:                               5.813 ns
   The Average Connection Delay on the 10 Worst Nets is:   4.742 ns

   Listing Pin Delays by value: (ns)

    d < 1.00   < d < 2.00  < d < 3.00  < d < 4.00  < d < 6.00  d >= 6.00
   ---------   ---------   ---------   ---------   ---------   ---------
        5592        6755        2878         689          94           0

Timing Score: 0

Asterisk (*) preceding a constraint indicates it was not met.

--------------------------------------------------------------------------------
  Constraint                                | Requested  | Actual     | Logic 
                                            |            |            | Levels
--------------------------------------------------------------------------------
  TS_sys_clk = PERIOD TIMEGRP "sys_clk"  15 | 15.000ns   | 14.571ns   | 7    
   nS   HIGH 50.000000 %                    |            |            |      
--------------------------------------------------------------------------------
  TS_CLK90 = PERIOD TIMEGRP "sys_clk_90"  1 |            |            |      
  5 nS   HIGH 50.000000 %                   |            |            |      
--------------------------------------------------------------------------------
  TSCLK2CLK90 = MAXDELAY FROM TIMEGRP "sys_ | 3.000ns    | 2.677ns    | 0    
  clk" TO TIMEGRP "sys_clk_90" 3 nS         |            |            |      
--------------------------------------------------------------------------------
  TS_ddr_clk_90 = PERIOD TIMEGRP "ddr_clk_9 | 15.000ns   | 7.028ns    | 0    
  0"  15 nS   HIGH 50.000000 %              |            |            |      
--------------------------------------------------------------------------------


All constraints were met.

All signals are completely routed.

Total REAL time to par completion: 2 mins 16 secs 
Total CPU time to par completion: 1 mins 51 secs 

Placement: Completed - No errors found.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Writing design to file system.ncd.


PAR done.

Release 5.2.02i - xst F-30a
Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.
--> WARNING:Xst:1216 - Speed Grade not specified or wrong: using -6

TABLE OF CONTENTS
  1) Synthesis Options Summary
  2) HDL Compilation
  3) HDL Analysis
  4) HDL Synthesis
     4.1) HDL Synthesis Report
  5) Low Level Synthesis
  6) Final Report
     6.1) Device utilization summary
     6.2) TIMING REPORT


=========================================================================
*                      Synthesis Options Summary                        *
=========================================================================
---- Source Parameters
Input Format                       : VHDL
Input File Name                    : z:/microblaze/mbvanilla_ddr/synthesis/system_xst.prj

---- Target Parameters
Target Device                      : virtex2
Output File Name                   : z:/microblaze/mbvanilla_ddr/implementation/system.ngc

---- Source Options
Top Module Name                    : system
Architecture Name                  : virtex2

---- Target Options
Add IO Buffers                     : no

---- General Options
Optimization Effort                : 2
Optimization Criterion             : speed
Hierarchy Separator                : /

=========================================================================


=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file z:/microblaze/mbvanilla_ddr/hdl/system.vhd in Library work.
Entity <system> (Architecture <imp>) compiled.

=========================================================================
*                            HDL Analysis                               *
=========================================================================

Analyzing Entity <system> (Architecture <imp>).
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1378: Generating a Black Box for component <ibuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1384: Generating a Black Box for component <ibuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1390: Generating a Black Box for component <ibuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1396: Generating a Black Box for component <ibuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1402: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1408: Generating a Black Box for component <ibuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1414: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1420: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1426: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1432: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1438: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1444: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1450: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1456: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1462: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1468: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1474: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1480: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1486: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1492: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1498: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1504: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1510: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1516: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1522: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1528: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1534: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1540: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1546: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1552: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1558: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1564: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1570: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1576: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1582: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1588: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1594: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1600: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1606: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1612: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1618: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1624: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1630: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1636: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1642: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1648: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1656: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1664: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1672: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1680: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1688: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1696: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1704: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1712: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1720: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1728: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1736: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1744: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1752: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1760: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1768: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1776: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1784: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1792: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1800: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1808: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1816: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1824: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1832: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1840: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1848: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1856: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1864: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1872: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1880: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1888: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1896: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1904: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1910: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1916: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1922: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1930: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1938: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1946: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1954: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1962: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1970: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1978: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1986: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 1994: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2002: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2010: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2018: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2026: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2034: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2042: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2050: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2058: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2066: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2074: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2082: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2090: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2098: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2106: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2114: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2122: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2130: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2138: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2146: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2154: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2162: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2170: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2178: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2184: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2190: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2196: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2202: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2208: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2214: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2220: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2226: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2232: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2238: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2244: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2250: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2256: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2262: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2268: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2274: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2280: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2286: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2292: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2298: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2304: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2310: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2316: Generating a Black Box for component <obuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2322: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2330: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2338: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2346: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2354: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2362: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2370: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2378: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2386: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2394: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2402: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2410: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2418: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2426: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2434: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2442: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2450: Generating a Black Box for component <iobuf>.
WARNING:Xst:766 - z:/microblaze/mbvanilla_ddr/hdl/system.vhd line 2458: Generating a Black Box for component <iobuf>.
Entity <system> analyzed. Unit <system> generated.


=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Synthesizing Unit <system>.
    Related source file is z:/microblaze/mbvanilla_ddr/hdl/system.vhd.
Unit <system> synthesized.


=========================================================================
HDL Synthesis Report

Found no macro
=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================

Optimizing unit <system> ...

Mapping all equations...
Loading device for application Xst from file '2v40.nph' in environment C:/Xilinx.
Building and optimizing final netlist ...

=========================================================================
*                            Final Report                               *
=========================================================================
Final Results
Top Level Output File Name         : z:/microblaze/mbvanilla_ddr/implementation/system.ngc
Output Format                      : ngc
Optimization Criterion             : speed
Keep Hierarchy                     : no
Macro Generator                    : macro+

Design Statistics
# IOs                              : 154

Cell Usage :
# BELS                             : 2
#      GND                         : 1
#      VCC                         : 1
# IO Buffers                       : 154
#      ibuf                        : 5
#      iobuf                       : 82
#      obuf                        : 67
# Others                           : 17
#      bram_wrapper                : 1
#      console_uart_wrapper        : 1
#      d_lmb_bram_if_cntlr_wrapper : 1
#      d_lmb_v10_wrapper           : 1
#      d_opb_v20_wrapper           : 1
#      dcm_feedback_bufg_wrapper   : 1
#      ddr_controller_wrapper      : 1
#      debug_uart_wrapper          : 1
#      i_lmb_bram_if_cntlr_wrapper : 1
#      i_lmb_v10_wrapper           : 1
#      microblaze_wrapper          : 1
#      my_ddr_clk_gen_wrapper      : 1
#      system_dcm_wrapper          : 1
#      system_gpio_wrapper         : 1
#      system_intc_wrapper         : 1
#      system_memcon_wrapper       : 1
#      system_timer_wrapper        : 1
=========================================================================

Device utilization summary:
---------------------------

Selected Device : 2v40cs144-6 

 Number of bonded IOBs:                154  out of     88   175% (*) 

WARNING:Xst:1336 -  (*) More than 100% of Device resources are used


=========================================================================
TIMING REPORT

NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
      FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
      GENERATED AFTER PLACE-and-ROUTE.

Clock Information:
------------------
No clock signals found in this design

Timing Summary:
---------------
Speed Grade: -6

   Minimum period: No path found
   Minimum input arrival time before clock: No path found
   Maximum output required time after clock: No path found
   Maximum combinational path delay: 6.780ns

Timing Detail:
--------------
All values displayed in nanoseconds (ns)

-------------------------------------------------------------------------
Timing constraint: Default path analysis
Offset:              6.780ns (Levels of Logic = 1)
  Source:            system_memcon
  Destination:       sram_data<11>

  Data Path: system_memcon to sram_data<11>
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
    system_memcon_wrapper:mem_dq_t   32   0.000   1.715  system_memcon (sram_data_t)
     iobuf:t->io               5.065          iobuf_56 (sram_data<11>)
    ----------------------------------------
    Total                      6.780ns (5.065ns logic, 1.715ns route)
                                       (74.7% logic, 25.3% route)

=========================================================================
CPU : 12.01 / 12.73 s | Elapsed : 12.00 / 12.00 s
 
--> 

Total memory usage is 66408 kilobytes

Release 5.2.02i - Map F.30a
Xilinx Mapping Report File for Design 'system'

Design Information
------------------
Command Line   : map -o system_map.ncd system.ngd system.pcf 
Target Device  : 2v1000
Target Package : fg456
Target Speed   : -4
Mapper Version : virtex2 -- $Revision: 1.4 $
Mapped Date    : Thu Jul 24 08:38:59 2003

Design Summary
--------------
Number of errors:      0
Number of warnings:  101
Logic Utilization:
  Number of Slice Flip Flops:       1,600 out of  10,240   15%
  Number of 4 input LUTs:           2,063 out of  10,240   20%
Logic Distribution:
    Number of occupied Slices:                        1,706 out of   5,120   33%
    Number of Slices containing only related logic:   1,706 out of   1,706  100%
    Number of Slices containing unrelated logic:          0 out of   1,706    0%
        *See NOTES below for an explanation of the effects of unrelated logic
Total Number 4 input LUTs:          2,527 out of  10,240   24%
      Number used as logic:                        2,063
      Number used as a route-thru:                    37
      Number used for Dual Port RAMs:                320
      (Two LUTs used per Dual Port RAM)
      Number used as Shift registers:                107

   Number of bonded IOBs:             154 out of     324   47%
      IOB Flip Flops:                                70
      IOB Dual-Data Rate Flops:                      22
   Number of Block RAMs:                4 out of      40   10%
   Number of MULT18X18s:                3 out of      40    7%
   Number of GCLKs:                     7 out of      16   43%
   Number of DCMs:                      3 out of       8   37%

   Number of RPM macros:            1
Total equivalent gate count for design:  373,009
Additional JTAG gate count for IOBs:  7,392
Peak Memory Usage:  109 MB

NOTES:

   Related logic is defined as being logic that shares connectivity -
   e.g. two LUTs are "related" if they share common inputs.
   When assembling slices, Map gives priority to combine logic that
   is related.  Doing so results in the best timing performance.

   Unrelated logic shares no connectivity.  Map will only begin
   packing unrelated logic into a slice once 99% of the slices are
   occupied through related logic packing.

   Note that once logic distribution reaches the 99% level through
   related logic packing, this does not mean the device is completely
   utilized.  Unrelated logic packing will then begin, continuing until
   all usable LUTs and FFs are occupied.  Depending on your timing
   budget, increased levels of unrelated logic packing may adversely
   affect the overall timing performance of your design.


Table of Contents
-----------------
Section 1 - Errors
Section 2 - Warnings
Section 3 - Informational
Section 4 - Removed Logic Summary
Section 5 - Removed Logic
Section 6 - IOB Properties
Section 7 - RPMs
Section 8 - Guide Report
Section 9 - Area Group Summary
Section 10 - Modular Design Summary

Section 1 - Errors
------------------

Section 2 - Warnings
--------------------
WARNING:LIT:175 - Clock buffer is designated to drive clock loads. BUFGMUX
   symbol "my_ddr_clk_gen/ddr_clk_gen_0_i/core_dcm_clk0_bufg" (output
   signal=conn_0_bram_clk) has a mix of clock and non-clock loads. Some of the
   non-clock loads are (maximum of 5 listed):
   Pin CLK of microblaze/microblaze_0_i/data_flow_i/mul_unit_i/mult18x18_bd
   Pin CLK of microblaze/microblaze_0_i/data_flow_i/mul_unit_i/mult18x18_ad
   Pin CLK of microblaze/microblaze_0_i/data_flow_i/mul_unit_i/mult18x18_bc
   Pin CLKA of bram/bram_block_0_i/ramb16_s9_s9_0
   Pin CLKB of bram/bram_block_0_i/ramb16_s9_s9_0
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i16/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i16/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i15/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i15/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i14/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i14/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i10/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i10/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i13/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i13/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i9/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i9/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i12/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i12/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i8/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i8/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i7/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i7/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i2/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i2/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i11/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i11/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i6/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i6/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i30/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i30/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i3/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i3/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i4/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i4/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i29/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i29/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i0/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i0/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i25/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i25/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i24/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i24/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i5/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i5/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i20/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i20/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i28/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i28/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i1/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i1/re
   gfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i27/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i27/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i19/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i19/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i31/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i31/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i23/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i23/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i22/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i22/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i26/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i26/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i18/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i18/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i21/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i21/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i17/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   microblaze/microblaze_0_i/data_flow_i/register_file_i/register_file_bit_i17/r
   egfile_x2/SP.G is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU12/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU12/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU21/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU21/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU30/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU30/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU15/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU15/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU24/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU24/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU18/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU18/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU12/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU12/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU21/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU21/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU30/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU30/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU15/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU15/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU24/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU24/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU18/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU18/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU0/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU0/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU3/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU3/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU0/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU0/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling F output. F of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU3/SP
   is configured, but output is not used.
WARNING:DesignRules:331 - Blockcheck: Dangling G output. G of comp
   ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU3/SP
   is configured, but output is not used.
WARNING:DesignRules:367 - Netcheck: Loadless. Net
   microblaze/microblaze_0_i/decode_i/prefetch_buffer_i/buffer_addr_muxcy_l1/O
   has no load.
WARNING:DesignRules:367 - Netcheck: Loadless. Net
   microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i0/muxcy_x/O has no
   load.
WARNING:DesignRules:367 - Netcheck: Loadless. Net
   microblaze/microblaze_0_i/data_flow_i/div_unit_i1/new_q_muxcy_l0/O has no
   load.
WARNING:DesignRules:367 - Netcheck: Loadless. Net
   microblaze/microblaze_0_i/data_flow_i/div_unit_i1/d_muxcy_l0/O has no load.

Section 3 - Informational
-------------------------
INFO:MapLib:535 - The following Virtex BUFG(s) is/are being retargetted to
   Virtex2 BUFGMUX(s) with input tied to I0 and Select pin tied to constant 0:
   bufg symbol "dcm_feedback_bufg/my_bufg_0_i/u_bufg" (output signal=clk_fb_i),
   bufg symbol "my_ddr_clk_gen/ddr_clk_gen_0_i/core_dcm_clk0_bufg" (output
   signal=conn_0_bram_clk),
   bufg symbol "my_ddr_clk_gen/ddr_clk_gen_0_i/core_dcm_clk90_bufg" (output
   signal=sys_clk_90),
   bufg symbol "my_ddr_clk_gen/ddr_clk_gen_0_i/ddr_dcm_clk90_bufg" (output
   signal=ddr_clk_90),
   bufg symbol "my_ddr_clk_gen/ddr_clk_gen_0_i/ddr_dcm_fb_bufg" (output
   signal=my_ddr_clk_gen/ddr_clk_gen_0_i/ddr_dcm_fb),
   bufg symbol "system_dcm/my_dcm_0_i/clkin_bufg_inst" (output
   signal=system_dcm/my_dcm_0_i/clk_in_w),
   bufg symbol "system_dcm/my_dcm_0_i/clkout_bufg_inst" (output signal=clk66mhz)
INFO:MapLib:534 - The following XORCY(s) is/are demoted to LUTs because there is
   no MUXCY associated with them. Therefore, we cannot recognize the standard
   carry chain structure:
   XORCY symbol
   "console_uart/opb_uartlite_0_i/opb_uartlite_core_i/baud_rate_i/count_msub__n0
   000_inst_sum_78" (output
   signal=console_uart/opb_uartlite_0_i/opb_uartlite_core_i/baud_rate_i/count__n
   0000<0>),
   XORCY symbol
   "debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/baud_rate_i/count_msub__n000
   0_inst_sum_84" (output
   signal=debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/baud_rate_i/count__n00
   00<0>),
   XORCY symbol
   "system_memcon/opb_memcon_0_i/mem_state_machine_i/msub__n0032_inst_sum_46"
   (output signal=system_memcon/opb_memcon_0_i/mem_state_machine_i/_n0032<0>),
   XORCY symbol
   "system_memcon/opb_memcon_0_i/mem_state_machine_i/msub__n0033_inst_sum_46"
   (output signal=system_memcon/opb_memcon_0_i/mem_state_machine_i/_n0033<0>)
INFO:LIT:95 - All of the external outputs in this design are using slew rate
   limited output drivers. The delay on speed critical outputs can be
   dramatically reduced by designating them as fast outputs in the schematic.
INFO:DesignRules:547 - Blockcheck: To achieve optimal frequency synthesis
   performance with the CLKFX and CLKFX180 outputs of the DCM comp
   system_dcm/my_dcm_0_i/dcm_inst, consult the Virtex-II Interactive Data Sheet.

Section 4 - Removed Logic Summary
---------------------------------
 353 block(s) removed
 100 block(s) optimized away
 259 signal(s) removed

Section 5 - Removed Logic
-------------------------

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).

Loadless block "ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/gpcnt_i/muxcy_i10"
(MUX) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/gpcnt_i/gen_cry_kill_n<0>" is
loadless and has been removed.
  Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/gpcnt_i/mult_and_i10" (AND)
removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rascnt_i/muxcy_i10" (MUX)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rascnt_i/gen_cry_kill_n<0>" is
loadless and has been removed.
  Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rascnt_i/mult_and_i10" (AND)
removed.
Loadless block "ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rccnt_i/muxcy_i10"
(MUX) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rccnt_i/gen_cry_kill_n<0>" is
loadless and has been removed.
  Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rccnt_i/mult_and_i10" (AND)
removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/refi_pwrup_cnt_i/muxcy_i10" (MUX)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/refi_pwrup_cnt_i/gen_cry_kill_n<0
>" is loadless and has been removed.
  Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/refi_pwrup_cnt_i/mult_and_i10"
(AND) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rrdcnt_i/muxcy_i10" (MUX)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rrdcnt_i/gen_cry_kill_n" is
loadless and has been removed.
  Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/cntrs_i/rrdcnt_i/mult_and_i10" (AND)
removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU1" (FF)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N466" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU10"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N469" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU13"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N470" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU130"
(FF) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU139"
(ROM) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU16"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N471" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU19"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N472" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU22"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N473" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU25"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N474" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU28"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N475" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU31"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N476" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU34"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N477" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU37"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N478" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU4" (FF)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N467" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU40"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N479" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU43"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N480" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU46"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N481" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU7" (FF)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N468" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU81"
(FF) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU90"
(ROM) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU1" (FF)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N466" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU10"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N469" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU13"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N470" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU130"
(FF) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU139"
(ROM) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU16"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N471" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU19"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N472" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU22"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N473" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU25"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N474" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU28"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N475" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU31"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N476" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU34"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N477" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU37"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N478" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU4" (FF)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N467" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU40"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N479" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU43"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N480" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU46"
(FF) removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N481" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU7" (FF)
removed.
 The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N468" is
loadless and has been removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU81"
(FF) removed.
Loadless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU90"
(ROM) removed.
Loadless block "system_gpio/opb_gpio_0_i/abus_ff_i24" (SFF) removed.
Loadless block "system_gpio/opb_gpio_0_i/abus_ff_i25" (SFF) removed.
Loadless block "system_gpio/opb_gpio_0_i/abus_ff_i26" (SFF) removed.
Loadless block "system_gpio/opb_gpio_0_i/abus_ff_i27" (SFF) removed.
Loadless block "system_gpio/opb_gpio_0_i/abus_ff_i28" (SFF) removed.
Loadless block "system_gpio/opb_gpio_0_i/abus_ff_i30" (SFF) removed.
 The signal "d_opb_v20_opb_abus<30>" is loadless and has been removed.
  Loadless block "d_opb_v20/opb_v20_0_i/opb_abus_i/_n00921" (ROM) removed.
   The signal "_n0087<1>" is loadless and has been removed.
    Loadless block
"microblaze/microblaze_0_i/data_flow_i/alu_i/alu_bit_i30/i_abus_dff" (SFF)
removed.
   The signal "d_opb_v20_m_abus<62>" is loadless and has been removed.
    Loadless block "microblaze/microblaze_0_i/iopb_interface_i/im_abus_i30" (ROM)
removed.
     The signal "microblaze/microblaze_0_i/iopb_interface_i/instr_addr_d<30>" is
loadless and has been removed.
      Loadless block "microblaze/microblaze_0_i/iopb_interface_i/abus_ff_i30" (SFF)
removed.
Loadless block "system_gpio/opb_gpio_0_i/abus_ff_i31" (SFF) removed.
 The signal "d_opb_v20_opb_abus<31>" is loadless and has been removed.
  Loadless block "d_opb_v20/opb_v20_0_i/opb_abus_i/_n00951" (ROM) removed.
   The signal "_n0087<0>" is loadless and has been removed.
    Loadless block
"microblaze/microblaze_0_i/data_flow_i/alu_i/alu_bit_i31/i_abus_dff" (SFF)
removed.
   The signal "d_opb_v20_m_abus<63>" is loadless and has been removed.
    Loadless block "microblaze/microblaze_0_i/iopb_interface_i/im_abus_i31" (ROM)
removed.
     The signal "microblaze/microblaze_0_i/iopb_interface_i/_n0000" is loadless and
has been removed.
      Loadless block "microblaze/microblaze_0_i/iopb_interface_i/abus_ff_i31" (SFF)
removed.
Loadless block "system_gpio/opb_gpio_0_i/seqaddr_ff_i" (SFF) removed.
 The signal "d_opb_v20_opb_seqaddr" is loadless and has been removed.
  Loadless block "d_opb_v20/opb_v20_0_i/opb_seqaddr_i/_n00021" (ROM) removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i24" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i25" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i26" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i30" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_abus_reg_bit_i31" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i0" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i1" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i10" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i11" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i12" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i13" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i14" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i15" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i16" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i17" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i18" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i19" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i2" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i20" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i21" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i22" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i23" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i24" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i25" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i26" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i27" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i28" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i29" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i3" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i4" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i5" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i6" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i7" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i8" (SFF)
removed.
Loadless block "system_intc/opb_intc_0_i/opb_intfc_i/opb_dbus_reg_bit_i9" (SFF)
removed.
Loadless block "system_memcon/opb_memcon_0_i/mccr_fast_mode_i0" (SFF) removed.
 The signal "system_memcon/opb_memcon_0_i/_n0259" is loadless and has been
removed.
  Loadless block "system_memcon/opb_memcon_0_i/_n02591" (ROM) removed.
Loadless block "system_memcon/opb_memcon_0_i/mccr_fast_mode_i1" (SFF) removed.
 The signal "system_memcon/opb_memcon_0_i/valid_reg_write_bus<1>" is loadless and
has been removed.
  Loadless block "system_memcon/opb_memcon_0_i/_n02601" (ROM) removed.
   The signal "system_memcon/opb_memcon_0_i/n51150" is loadless and has been
removed.
    Loadless block "system_memcon/opb_memcon_0_i/ker511481" (ROM) removed.
Loadless block "system_memcon/opb_memcon_0_i/mccr_page_mode_i0" (SFF) removed.
Loadless block "system_memcon/opb_memcon_0_i/mccr_page_mode_i1" (SFF) removed.
Loadless block "system_memcon/opb_memcon_0_i/seqaddr_ff_i" (SFF) removed.
Loadless block "system_timer/opb_timer_0_i/abus_ff_i24" (SFF) removed.
Loadless block "system_timer/opb_timer_0_i/abus_ff_i25" (SFF) removed.
Loadless block "system_timer/opb_timer_0_i/abus_ff_i30" (SFF) removed.
Loadless block "system_timer/opb_timer_0_i/abus_ff_i31" (SFF) removed.
Loadless block "system_timer/opb_timer_0_i/seqaddr_ff_i" (SFF) removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i0" (SFF)
removed.
 The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ce<7>" is
loadless and has been removed.
  Loadless block "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n03771"
(ROM) removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i1" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i10" (SFF)
removed.
 The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ce<15>"
is loadless and has been removed.
  Loadless block "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n03861"
(ROM) removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i11" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i12" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i13" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i14" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i15" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i16" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i17" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i18" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i19" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i2" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i20" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i3" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i4" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i5" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i6" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i7" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i8" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr0_ff_i9" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i0" (SFF)
removed.
 The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ce<7>" is
loadless and has been removed.
  Loadless block "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n04451"
(ROM) removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i1" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i10" (SFF)
removed.
 The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ce<12>"
is loadless and has been removed.
  Loadless block "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n04501"
(ROM) removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i11" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i12" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i13" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i14" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i15" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i16" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i17" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i18" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i19" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i2" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i20" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i3" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i4" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i5" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i6" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i7" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i8" (SFF)
removed.
Loadless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/tcsr1_ff_i9" (SFF)
removed.
The signal "microblaze/valid_instr" is sourceless and has been removed.
The signal "microblaze/interrupt_taken" is sourceless and has been removed.
The signal "microblaze/jump_taken" is sourceless and has been removed.
The signal "microblaze/reg_write" is sourceless and has been removed.
The signal "microblaze/pc_ex<0>" is sourceless and has been removed.
The signal "microblaze/pc_ex<1>" is sourceless and has been removed.
The signal "microblaze/pc_ex<2>" is sourceless and has been removed.
The signal "microblaze/pc_ex<3>" is sourceless and has been removed.
The signal "microblaze/pc_ex<4>" is sourceless and has been removed.
The signal "microblaze/pc_ex<5>" is sourceless and has been removed.
The signal "microblaze/pc_ex<6>" is sourceless and has been removed.
The signal "microblaze/pc_ex<7>" is sourceless and has been removed.
The signal "microblaze/pc_ex<8>" is sourceless and has been removed.
The signal "microblaze/pc_ex<9>" is sourceless and has been removed.
The signal "microblaze/pc_ex<10>" is sourceless and has been removed.
The signal "microblaze/pc_ex<11>" is sourceless and has been removed.
The signal "microblaze/pc_ex<12>" is sourceless and has been removed.
The signal "microblaze/pc_ex<13>" is sourceless and has been removed.
The signal "microblaze/pc_ex<14>" is sourceless and has been removed.
The signal "microblaze/pc_ex<15>" is sourceless and has been removed.
The signal "microblaze/pc_ex<16>" is sourceless and has been removed.
The signal "microblaze/pc_ex<17>" is sourceless and has been removed.
The signal "microblaze/pc_ex<18>" is sourceless and has been removed.
The signal "microblaze/pc_ex<19>" is sourceless and has been removed.
The signal "microblaze/pc_ex<20>" is sourceless and has been removed.
The signal "microblaze/pc_ex<21>" is sourceless and has been removed.
The signal "microblaze/pc_ex<22>" is sourceless and has been removed.
The signal "microblaze/pc_ex<23>" is sourceless and has been removed.
The signal "microblaze/pc_ex<24>" is sourceless and has been removed.
The signal "microblaze/pc_ex<25>" is sourceless and has been removed.
The signal "microblaze/pc_ex<26>" is sourceless and has been removed.
The signal "microblaze/pc_ex<27>" is sourceless and has been removed.
The signal "microblaze/pc_ex<28>" is sourceless and has been removed.
The signal "microblaze/pc_ex<29>" is sourceless and has been removed.
The signal "microblaze/pc_ex<30>" is sourceless and has been removed.
The signal "microblaze/pc_ex<31>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<0>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<1>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<2>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<3>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<4>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<5>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<6>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<7>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<8>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<9>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<10>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<11>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<12>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<13>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<14>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<15>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<16>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<17>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<18>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<19>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<20>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<21>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<22>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<23>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<24>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<25>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<26>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<27>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<28>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<29>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<30>" is sourceless and has been removed.
The signal "microblaze/new_reg_value<31>" is sourceless and has been removed.
The signal "microblaze/reg_addr<0>" is sourceless and has been removed.
The signal "microblaze/reg_addr<1>" is sourceless and has been removed.
The signal "microblaze/reg_addr<2>" is sourceless and has been removed.
The signal "microblaze/reg_addr<3>" is sourceless and has been removed.
The signal "microblaze/reg_addr<4>" is sourceless and has been removed.
The signal "microblaze/prefetch_addr<1>" is sourceless and has been removed.
The signal "microblaze/prefetch_addr<2>" is sourceless and has been removed.
The signal "microblaze/prefetch_addr<3>" is sourceless and has been removed.
The signal "microblaze/msr_reg<0>" is sourceless and has been removed.
The signal "microblaze/msr_reg<1>" is sourceless and has been removed.
The signal "microblaze/msr_reg<2>" is sourceless and has been removed.
The signal "microblaze/msr_reg<3>" is sourceless and has been removed.
The signal "microblaze/msr_reg<4>" is sourceless and has been removed.
The signal "microblaze/msr_reg<5>" is sourceless and has been removed.
The signal "microblaze/msr_reg<6>" is sourceless and has been removed.
The signal "microblaze/msr_reg<7>" is sourceless and has been removed.
The signal "microblaze/microblaze_0_i/jump_taken_n9907" is sourceless and has
been removed.
 Sourceless block "microblaze/microblaze_0_i/jump_taken" (SFF) removed.
The signal "microblaze/microblaze_0_i/reg_write_n9907" is sourceless and has
been removed.
 Sourceless block "microblaze/microblaze_0_i/reg_write" (SFF) removed.
The signal "microblaze/microblaze_0_i/iopb_interface_i/iopb_interrupt" is
sourceless and has been removed.
The signal "microblaze/microblaze_0_i/dopb_interface_i/dopb_interrupt" is
sourceless and has been removed.
The signal
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i0/carry_out" is
sourceless and has been removed.
The signal "microblaze/microblaze_0_i/data_flow_i/operand_select_i/_n0004" is
sourceless and has been removed.
The signal "microblaze/microblaze_0_i/data_flow_i/div_unit_i1/new_q_muxcy_l0/LO"
is sourceless and has been removed.
The signal "microblaze/microblaze_0_i/data_flow_i/div_unit_i1/d_muxcy_l0/LO" is
sourceless and has been removed.
The signal "microblaze/microblaze_0_i/decode_i/_n0115" is sourceless and has
been removed.
The signal "microblaze/microblaze_0_i/decode_i/_n0135" is sourceless and has
been removed.
 Sourceless block "microblaze/microblaze_0_i/decode_i/interrupt_taken" (FF)
removed.
The signal "microblaze/microblaze_0_i/decode_i/_n0134" is sourceless and has
been removed.
 Sourceless block "microblaze/microblaze_0_i/decode_i/valid_instr" (FF) removed.
The signal "microblaze/microblaze_0_i/decode_i/take_nm_break<0>" is sourceless
and has been removed.
 Sourceless block "microblaze/microblaze_0_i/decode_i/_n01151" (ROM) removed.
The signal "microblaze/microblaze_0_i/decode_i/_n0102" is sourceless and has
been removed.
The signal
"microblaze/microblaze_0_i/decode_i/prefetch_buffer_i/buffer_addr_muxcy_l1/LO"
is sourceless and has been removed.
The signal "my_ddr_clk_gen/ddr_dcm_locked" is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N1277" is
sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU77"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU77/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU77/MUXC
Y_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU77/LO"
is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/N1805" is
sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU126"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU126/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU126/MUX
CY_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU126/LO"
is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU74/S"
is sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU74"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU74/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU74/MUXC
Y_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU74/LO"
is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU123/S"
is sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU123"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU123/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU123/MUX
CY_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU123/LO"
is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N1277" is
sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU77"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU77/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU77/MUXC
Y_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU77/LO"
is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/N1805" is
sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU126"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU126/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU126/MUX
CY_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU126/LO"
is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU74/S"
is sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU74"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU74/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU74/MUXC
Y_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU74/LO"
is sourceless and has been removed.
The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU123/S"
is sourceless and has been removed.
 Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU123"
(MUX) removed.
  The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU123/O"
is sourceless and has been removed.
   Sourceless block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU123/MUX
CY_L_BUF" (BUF) removed.
    The signal
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU123/LO"
is sourceless and has been removed.
The signal "system_memcon/mem_status_intrpt" is sourceless and has been removed.
The signal "system_memcon/mem_qwen<0>" is sourceless and has been removed.
The signal "system_memcon/mem_qwen<1>" is sourceless and has been removed.
The signal "system_memcon/mem_qwen<2>" is sourceless and has been removed.
The signal "system_memcon/mem_qwen<3>" is sourceless and has been removed.
The signal "system_memcon/mem_rec_states_out<3>" is sourceless and has been
removed.
The signal "console_uart/interrupt" is sourceless and has been removed.
The signal "console_uart/opb_uartlite_0_i/opb_uartlite_core_i/_n0006" is
sourceless and has been removed.
 Sourceless block "console_uart/opb_uartlite_0_i/opb_uartlite_core_i/interrupt"
(FF) removed.
The signal
"console_uart/opb_uartlite_0_i/opb_uartlite_core_i/tx_buffer_empty_pre" is
sourceless and has been removed.
 Sourceless block "console_uart/opb_uartlite_0_i/opb_uartlite_core_i/_n00061"
(ROM) removed.
The signal "console_uart/opb_uartlite_0_i/opb_uartlite_core_i/_n0036<10>" is
sourceless and has been removed.
 Sourceless block
"console_uart/opb_uartlite_0_i/opb_uartlite_core_i/tx_buffer_empty_fdre" (SFF)
removed.
The signal "debug_uart/interrupt" is sourceless and has been removed.
The signal "debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/_n0006" is
sourceless and has been removed.
 Sourceless block "debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/interrupt"
(FF) removed.
The signal "debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/tx_buffer_empty_pre"
is sourceless and has been removed.
 Sourceless block "debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/_n00061" (ROM)
removed.
The signal "debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/_n0036<10>" is
sourceless and has been removed.
 Sourceless block
"debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/tx_buffer_empty_fdre" (SFF)
removed.
The signal "system_intc/opb_intc_0_i/opb_intfc_i/_n0000" is sourceless and has
been removed.
 Sourceless block "system_intc/opb_intc_0_i/opb_intfc_i/err_ack_i" (SFF) removed.
  The signal "d_opb_v20_sl_errack<4>" is sourceless and has been removed.
   Sourceless block "d_opb_v20/opb_v20_0_i/opb_errack_i/_n0007_sw0" (ROM) removed.
    The signal "d_opb_v20/n85050" is sourceless and has been removed.
     Sourceless block "d_opb_v20/opb_v20_0_i/opb_errack_i/_n0007" (ROM) removed.
      The signal "d_opb_v20_opb_errack" is sourceless and has been removed.
       Sourceless block "microblaze/microblaze_0_i/iopb_interface_i/iopb_interrupt_i"
(ROM) removed.
       Sourceless block "microblaze/microblaze_0_i/dopb_interface_i/dopb_interrupt_i"
(ROM) removed.
The signal "system_intc/opb_intc_0_i/intc_core_i/ints_pending<1>" is sourceless
and has been removed.
The signal "system_intc/opb_intc_0_i/intc_core_i/intr_det_i/clear<1>" is
sourceless and has been removed.
The signal
"system_intc/opb_intc_0_i/intc_core_i/intr_det_i/detect_intr_i/lvl_det_bit_i1/cl
k_enable" is sourceless and has been removed.
The signal "system_intc/opb_intc_0_i/intc_write1" is sourceless and has been
removed.
 Sourceless block "system_intc/opb_intc_0_i/intc_core_i/intr_det_i/clear<1>1"
(ROM) removed.
The signal "system_timer/pwm0" is sourceless and has been removed.
 Sourceless block "system_timer/opb_timer_0_i/tc_core_i/pwm_ff_i" (SFF) removed.
The signal "system_timer/generateout0" is sourceless and has been removed.
The signal "system_timer/generateout1" is sourceless and has been removed.
 Sourceless block "system_timer/opb_timer_0_i/tc_core_i/pwm_reset1" (ROM)
removed.
  The signal "system_timer/opb_timer_0_i/tc_core_i/pwm_reset" is sourceless and
has been removed.
The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n0011" is
sourceless and has been removed.
The signal
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig1_edge" is
sourceless and has been removed.
The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n0015" is
sourceless and has been removed.
 Sourceless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/generateout0" (SFF)
removed.
The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n0016" is
sourceless and has been removed.
 Sourceless block
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/generateout1" (SFF)
removed.
The signal "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n0012" is
sourceless and has been removed.
The signal
"system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig0_edge" is
sourceless and has been removed.
The signal "d_opb_v20/opb_hwack" is sourceless and has been removed.
The signal "d_opb_v20/opb_dwack" is sourceless and has been removed.
The signal "d_opb_v20/opb_dwxfer" is sourceless and has been removed.
The signal "d_opb_v20/opb_bexfer" is sourceless and has been removed.
The signal "d_opb_v20/opb_fwxfer" is sourceless and has been removed.
The signal "d_opb_v20/opb_fwack" is sourceless and has been removed.
The signal "d_opb_v20/opb_hwxfer" is sourceless and has been removed.
The signal "d_opb_v20/opb_beack" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<0>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<1>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<2>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<3>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<4>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<5>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<6>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<7>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<8>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<9>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<10>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<11>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<12>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<13>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<14>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<15>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<16>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<17>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<18>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<19>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<20>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<21>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<22>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<23>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<24>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<25>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<26>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<27>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<28>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<29>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<30>" is sourceless and has been removed.
The signal "d_opb_v20/opb_wrdbus<31>" is sourceless and has been removed.
The signal "d_opb_v20/n85274" is sourceless and has been removed.
 Sourceless block "d_opb_v20/opb_v20_0_i/opb_hwack_i/_n0007" (ROM) removed.
The signal "d_opb_v20/n85242" is sourceless and has been removed.
 Sourceless block "d_opb_v20/opb_v20_0_i/opb_fwack_i/_n0007" (ROM) removed.
The signal "d_opb_v20/n85210" is sourceless and has been removed.
 Sourceless block "d_opb_v20/opb_v20_0_i/opb_beack_i/_n0007" (ROM) removed.
The signal "d_opb_v20/n85178" is sourceless and has been removed.
 Sourceless block "d_opb_v20/opb_v20_0_i/opb_dwack_i/_n0007" (ROM) removed.
The signal "system_dcm/clk_lock" is sourceless and has been removed.
The signal "system_dcm/clk_fx_180" is sourceless and has been removed.

The trimmed logic reported below is either:
   1. part of a cycle
   2. part of disabled logic
   3. a side-effect of other trimmed logic

The signal "net_vcc7<6>" is unused and has been removed.
 Unused block "xst_vcc" (ONE) removed.
The signal "conn_0_bram_addr<30>" is unused and has been removed.
 Unused block
"microblaze/microblaze_0_i/byte_doublet_handle_i/low_addr_out_left_i" (ROM)
removed.
The signal "conn_0_bram_addr<31>" is unused and has been removed.
 Unused block
"microblaze/microblaze_0_i/byte_doublet_handle_i/low_addr_out_right_i" (ROM)
removed.
The signal "conn_0_bram_rst" is unused and has been removed.
 Unused block "d_lmb_bram_if_cntlr/xst_gnd" (ZERO) removed.
The signal "conn_1_bram_rst" is unused and has been removed.
 Unused block "i_lmb_bram_if_cntlr/xst_gnd" (ZERO) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i0/muxcy_x/MUXCY_L_BUF
" (BUF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/div_unit_i1/new_q_muxcy_l0/MUXCY_L_BUF"
(BUF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/div_unit_i1/d_muxcy_l0/MUXCY_L_BUF" (BUF)
removed.
Unused block
"microblaze/microblaze_0_i/decode_i/prefetch_buffer_i/buffer_addr_muxcy_l1/MUXCY
_L_BUF" (BUF) removed.
Unused block
"console_uart/opb_uartlite_0_i/opb_uartlite_core_i/opb_uartlite_tx_i/tx_buffer_e
mpty1" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_beack_i/_n0007_sw0" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_bexfer_i/_n00021" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_dwack_i/_n0007_sw0" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_dwxfer_i/_n00021" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_fwack_i/_n0007_sw0" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_fwxfer_i/_n00021" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_hwack_i/_n0007_sw0" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_hwxfer_i/_n00021" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00021" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00051" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00081" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00111" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00141" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00171" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00201" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00231" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00261" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00291" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00321" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00351" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00381" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00411" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00441" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00471" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00501" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00531" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00561" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00591" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00621" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00651" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00681" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00711" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00741" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00771" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00801" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00831" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00861" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00891" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00921" (ROM) removed.
Unused block "d_opb_v20/opb_v20_0_i/opb_wrdbus_i/_n00951" (ROM) removed.
Unused block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU125"
(ROM) removed.
Unused block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/BU76"
(ROM) removed.
Unused block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU125"
(ROM) removed.
Unused block
"ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/BU76"
(ROM) removed.
Unused block
"debug_uart/opb_uartlite_0_i/opb_uartlite_core_i/opb_uartlite_tx_i/tx_buffer_emp
ty1" (ROM) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i0/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i1/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i10/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i11/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i12/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i13/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i14/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i15/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i16/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i17/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i18/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i19/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i2/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i20/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i21/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i22/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i23/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i24/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i25/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i26/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i27/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i28/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i29/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i3/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i30/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i31/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i4/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i5/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i6/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i7/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i8/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/pc_module_i/pc_bit_i9/pc_ex_dff" (FF)
removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i0/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i1/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i10/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i11/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i12/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i13/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i14/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i15/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i16/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i17/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i18/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i19/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i2/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i20/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i21/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i22/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i23/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i24/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i25/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i26/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i27/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i28/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i29/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i3/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i30/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i31/ex_result
_dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i4/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i5/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i6/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i7/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i8/ex_result_
dff" (FF) removed.
Unused block
"microblaze/microblaze_0_i/data_flow_i/result_mux_i/result_mux_bit_i9/ex_result_
dff" (FF) removed.
Unused block "microblaze/microblaze_0_i/decode_i/_n01341" (ROM) removed.
Unused block "microblaze/microblaze_0_i/decode_i/_n01351" (ROM) removed.
Unused block "microblaze/microblaze_0_i/decode_i/take_nm_break_0" (FF) removed.
Unused block "microblaze/microblaze_0_i/jump_taken_sclr_inv1" (ROM) removed.
Unused block "microblaze/microblaze_0_i/msr_2_0" (FF) removed.
Unused block "microblaze/microblaze_0_i/msr_2_1" (FF) removed.
Unused block "microblaze/microblaze_0_i/msr_2_2" (FF) removed.
Unused block "microblaze/microblaze_0_i/msr_2_3" (FF) removed.
Unused block "microblaze/microblaze_0_i/msr_2_4" (FF) removed.
Unused block "microblaze/microblaze_0_i/msr_2_5" (FF) removed.
Unused block "microblaze/microblaze_0_i/msr_2_6" (FF) removed.
Unused block "microblaze/microblaze_0_i/msr_2_7" (FF) removed.
Unused block "microblaze/microblaze_0_i/prefetch_addr_1" (FF) removed.
Unused block "microblaze/microblaze_0_i/prefetch_addr_2" (FF) removed.
Unused block "microblaze/microblaze_0_i/prefetch_addr_3" (FF) removed.
Unused block "microblaze/microblaze_0_i/reg_addr_0" (FF) removed.
Unused block "microblaze/microblaze_0_i/reg_addr_1" (FF) removed.
Unused block "microblaze/microblaze_0_i/reg_addr_2" (FF) removed.
Unused block "microblaze/microblaze_0_i/reg_addr_3" (FF) removed.
Unused block "microblaze/microblaze_0_i/reg_addr_4" (FF) removed.
Unused block "microblaze/microblaze_0_i/reg_write_sclr_inv1" (ROM) removed.
Unused block
"system_intc/opb_intc_0_i/intc_core_i/intr_det_i/detect_intr_i/lvl_det_bit_i1/cl
k_enable1" (ROM) removed.
Unused block
"system_intc/opb_intc_0_i/intc_core_i/regs_i/wr_reg_decode_i/_n00211_sw2" (ROM)
removed.
Unused block "system_intc/opb_intc_0_i/opb_intfc_i/_n00001" (ROM) removed.
Unused block "system_memcon/opb_memcon_0_i/mem_qwen<0>1" (ROM) removed.
Unused block "system_memcon/opb_memcon_0_i/mem_qwen<1>1" (ROM) removed.
Unused block "system_memcon/opb_memcon_0_i/mem_qwen<2>1" (ROM) removed.
Unused block "system_memcon/opb_memcon_0_i/mem_qwen<3>1" (ROM) removed.
Unused block "system_memcon/opb_memcon_0_i/mem_status_intrpt1" (ROM) removed.
Unused block "system_memcon/opb_memcon_0_i/wait_states_i/mem_wait_states<2>1"
(ROM) removed.
Unused block "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n00151"
(ROM) removed.
Unused block "system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n00161"
(ROM) removed.

Optimized Block(s):
TYPE 		BLOCK
GND 		bram/xst_gnd
GND 		console_uart/xst_gnd
VCC 		console_uart/xst_vcc
VCC 		d_lmb_bram_if_cntlr/xst_vcc
GND 		d_lmb_v10/xst_gnd
VCC 		d_lmb_v10/xst_vcc
FDSE
		d_opb_v20/opb_v20_0_i/opb_arbiter_i/opb_arbiter_core_i/priority_regs_i/low_pri
or_reg1/master_id_0
   optimized to 1
FDRE
		d_opb_v20/opb_v20_0_i/opb_arbiter_i/opb_arbiter_core_i/priority_regs_i/prior_r
eg0/master_id_0
   optimized to 0
LUT4 		d_opb_v20/opb_v20_0_i/opb_toutsup_i/_n0007_sw0
GND 		d_opb_v20/xst_gnd
VCC 		d_opb_v20/xst_vcc
GND 		ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/GND
VCC 		ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i0/VCC
GND 		ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/GND
VCC 		ddr_controller/opb_ddr_0_i/ddr_ctrl_i/rddata_path_i/v2_asynch_fifo_i1/VCC
GND 		ddr_controller/xst_gnd
VCC 		ddr_controller/xst_vcc
GND 		debug_uart/xst_gnd
VCC 		debug_uart/xst_vcc
LUT3 		i_lmb_bram_if_cntlr/lmb_bram_if_cntlr_0_i/_n00021
LUT3 		i_lmb_bram_if_cntlr/lmb_bram_if_cntlr_0_i/_n00041
LUT3 		i_lmb_bram_if_cntlr/lmb_bram_if_cntlr_0_i/_n00061
LUT3 		i_lmb_bram_if_cntlr/lmb_bram_if_cntlr_0_i/_n00081
VCC 		i_lmb_bram_if_cntlr/xst_vcc
GND 		i_lmb_v10/xst_gnd
VCC 		i_lmb_v10/xst_vcc
GND 		microblaze/microblaze_0_i/data_flow_i/msr_reg_i/xst_gnd
GND 		microblaze/microblaze_0_i/data_flow_i/mul_unit_i/xst_gnd
VCC 		microblaze/microblaze_0_i/data_flow_i/mul_unit_i/xst_vcc
GND 		microblaze/microblaze_0_i/data_flow_i/operand_select_i/xst_gnd
GND 		microblaze/microblaze_0_i/data_flow_i/pc_module_i/xst_gnd
VCC 		microblaze/microblaze_0_i/data_flow_i/result_mux_i/xst_vcc
GND 		microblaze/microblaze_0_i/data_flow_i/shift_logic_module_i/xst_gnd
GND 		microblaze/microblaze_0_i/data_flow_i/xst_gnd
VCC 		microblaze/microblaze_0_i/data_flow_i/xst_vcc
GND 		microblaze/microblaze_0_i/data_flow_i/zero_detect_i/xst_gnd
VCC 		microblaze/microblaze_0_i/data_flow_i/zero_detect_i/xst_vcc
LUT3 		microblaze/microblaze_0_i/decode_i/_n01021
FDRSE 		microblaze/microblaze_0_i/decode_i/ext_nm_brk_fdrse
   optimized to 0
FDC 		microblaze/microblaze_0_i/decode_i/take_break_0
   optimized to 0
GND 		microblaze/microblaze_0_i/dopb_interface_i/xst_gnd
GND 		microblaze/microblaze_0_i/iopb_interface_i/xst_gnd
GND 		microblaze/xst_gnd
VCC 		microblaze/xst_vcc
GND 		my_ddr_clk_gen/xst_gnd
GND 		system_dcm/xst_gnd
GND 		system_gpio/xst_gnd
FDRE
		system_intc/opb_intc_0_i/intc_core_i/intr_det_i/detect_intr_i/lvl_det_bit_i1/a
ctive_high_lvl_i
   optimized to 0
LUT2 		system_intc/opb_intc_0_i/intc_core_i/intr_det_i/ints_pending<1>1
FDR 		system_intc/opb_intc_0_i/intc_core_i/irq_gen_i/masked_ints_reg_bit_i1
   optimized to 0
LUT4 		system_intc/opb_intc_0_i/intc_core_i/irq_gen_i/or_acks_i/_n0002_sw0
FDR 		system_intc/opb_intc_0_i/intc_core_i/regs_i/isr_reg_bit_i1
   optimized to 0
FDR 		system_intc/opb_intc_0_i/intc_core_i/regs_i/opt_regs_i/ipr_reg_bit_i1
   optimized to 0
LUT4_L
		system_intc/opb_intc_0_i/intc_core_i/regs_i/rd_reg_mux_i/mmux_bus_out_inst_lut
3_1321
LOCALBUF
		system_intc/opb_intc_0_i/intc_core_i/regs_i/rd_reg_mux_i/mmux_bus_out_inst_lut
3_1321/LUT4_L_BUF
LUT4 		system_intc/opb_intc_0_i/intc_core_i/regs_i/rd_reg_sel<0>1_sw5
LUT2 		system_intc/opb_intc_0_i/opb_intfc_i/intc_wr1_sw0
GND 		system_intc/xst_gnd
VCC 		system_intc/xst_vcc
GND 		system_memcon/xst_gnd
VCC 		system_memcon/xst_vcc
LUT2 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n00111
LUT2 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n00121
LUT3 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n05071
LUT3 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/_n05081
FDR 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig0_d
   optimized to 0
FDR 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig0_d2
   optimized to 0
LUT2 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig0_edge1
FDR 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig1_d
   optimized to 0
FDR 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig1_d2
   optimized to 0
LUT2 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/capturetrig1_edge1
LUT3 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/ker700031
LUT3 		system_timer/opb_timer_0_i/tc_core_i/timer_control_i/ker700081
GND 		system_timer/xst_gnd
VCC 		system_timer/xst_vcc
GND 		xst_gnd
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first0
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first1
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first10
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first11
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first12
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first13
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first14
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first15
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first16
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first17
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first18
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first19
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first2
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first20
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first3
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first4
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first5
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first6
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first7
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first8
muxcy
		system_timer/opb_timer_0_i/tc_core_i/bus_interface_i/read_mux_i/cymux_first9

To enable printing of redundant blocks removed and signals merged, set the
detailed map report option and rerun map.

Section 6 - IOB Properties
--------------------------

+------------------------------------------------------------------------------------------------------------------------+
| IOB Name                           | Type    | Direction | IO Standard | Drive    | Slew | Reg (s)  | Resistor | IOB   |
|                                    |         |           |             | Strength | Rate |          |          | Delay |
+------------------------------------------------------------------------------------------------------------------------+
| console_uart_rx                    | IOB     | INPUT     | LVTTL       |          |      |          |          |       |
| console_uart_tx                    | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| ddr_addr<0>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<1>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<2>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<3>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<4>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<5>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<6>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<7>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<8>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<9>                        | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<10>                       | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<11>                       | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_addr<12>                       | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_bankaddr<0>                    | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_bankaddr<1>                    | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_casn                           | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_clk                            | IOB     | OUTPUT    | SSTL2_I     |          |      | OUTDDR   |          |       |
| ddr_clk_fb                         | IOB     | INPUT     | SSTL2_I     |          |      |          |          |       |
| ddr_clke                           | IOB     | OUTPUT    | SSTL2_I     |          |      |          |          |       |
| ddr_clkn                           | IOB     | OUTPUT    | SSTL2_I     |          |      | OUTDDR   |          |       |
| ddr_csn                            | IOB     | OUTPUT    | SSTL2_I     |          |      |          |          |       |
| ddr_dq<0>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<1>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<2>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<3>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<4>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<5>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<6>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<7>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<8>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<9>                          | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<10>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<11>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<12>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<13>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<14>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dq<15>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    |          |       |
|                                    |         |           |             |          |      | INFF2    |          |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dqm<0>                         | IOB     | OUTPUT    | SSTL2_I     |          |      | OUTDDR   |          |       |
| ddr_dqm<1>                         | IOB     | OUTPUT    | SSTL2_I     |          |      | OUTDDR   |          |       |
| ddr_dqs<0>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    | PULLDOWN |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_dqs<1>                         | IOB     | BIDIR     | SSTL2_I     |          |      | INFF1    | PULLDOWN |       |
|                                    |         |           |             |          |      | OUTDDR   |          |       |
|                                    |         |           |             |          |      | ENFF1    |          |       |
| ddr_rasn                           | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| ddr_wen                            | IOB     | OUTPUT    | SSTL2_I     |          |      | OFF1     |          |       |
| debug_uart_rx                      | IOB     | INPUT     | LVTTL       |          |      |          |          |       |
| debug_uart_tx                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| ext_clk                            | IOB     | INPUT     | LVTTL       |          |      |          |          |       |
| gpio<0>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<1>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<2>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<3>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<4>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<5>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<6>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<7>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<8>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<9>                            | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<10>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<11>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<12>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<13>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<14>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<15>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<16>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<17>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<18>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<19>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<20>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<21>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<22>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<23>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<24>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<25>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<26>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<27>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<28>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<29>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<30>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| gpio<31>                           | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<0>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<1>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<2>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<3>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<4>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<5>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<6>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<7>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<8>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<9>                       | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<10>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<11>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<12>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<13>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<14>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<15>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<16>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<17>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<18>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<19>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<20>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<21>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<22>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<23>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<24>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<25>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<26>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<27>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<28>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<29>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<30>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_addr<31>                      | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_ben<0>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_ben<1>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_ben<2>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_ben<3>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_cen<0>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_cen<1>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<0>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<1>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<2>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<3>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<4>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<5>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<6>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<7>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<8>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<9>                       | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<10>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<11>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<12>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<13>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<14>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<15>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<16>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<17>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<18>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<19>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<20>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<21>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<22>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<23>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<24>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<25>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<26>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<27>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<28>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<29>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<30>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_data<31>                      | IOB     | BIDIR     | LVTTL       | 12       | SLOW |          |          |       |
| sram_oen                           | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_rst                           | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sram_wen                           | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       |
| sys_rst                            | IOB     | INPUT     | LVTTL       |          |      |          |          |       |
+------------------------------------------------------------------------------------------------------------------------+

Section 7 - RPMs
----------------
microblaze                              

Section 8 - Guide Report
------------------------
Guide not run on this design.

Section 9 - Area Group Summary
------------------------------
No area groups were found in this design.

Section 10 - Modular Design Summary
-----------------------------------
Modular Design not used for this design.

References:
- AW: AW: [microblaze-uclinux] Xmdstub connect on serial port
  - From: "Schunke Jan-Hendrik" <Schunke@shf-communication.de>

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