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Re: [microblaze-uclinux] Questions about the Ethernet interface



Hi Peter,

Peter Ryser wrote:
> I'd like to encourage you to fix the xparameters.h to match up the 
> defines used in the drivers instead of changing the drivers. As a result 
> you will get EDK integration for free.

Using the xilinc_emac driver, when it initialises the module, and calls 
the probe() function, I receive the warning

eth0: No PHY detected.  Assuming a PHY at address 0.

After boot up, I configure the interface (ifconfig), and that seems to 
partially work (sets the MAC and IP addresses properly), however I then 
get more PHY-related errors:

eth0: Could not read PHY control register; error 19
eth0: Could not read PHY control register; error 19
eth0: Terminating link monitoring

If I try to send any packets through this interface (with ping, which 
works fine with the loopback interface "lo", hooray!), it crashes after 
multiple errors of

eth0: Could not transmit buffer
eth0: Could not transmit buffer
...


I've lifted the MHS and UCF configuration from an existing Insight 
ethernet demo (using the xil_net stuff), so that should all be fine?

I've dug into the driver code, basically it seems to relate to the MII 
PHY interface.

PORT ETH_MDC = ETH_MDC, DIR = IN
PORT ETH_MDIO = ETH_MDIO, DIR = IN

Just looking at it, shouldn't the ETH_MDIO (which is the phy_mii_data) 
be INOUT?  I know nothing about the MII interface, but I assume at least 
that it's two way?

Anyway, continuing on...

BEGIN opb_ethernet
  PARAMETER INSTANCE = ether
  PARAMETER C_FAMILY = virtex2
  PARAMETER HW_VER = 1.00.k
  PARAMETER C_DMA_PRESENT = 1
  PARAMETER C_DMA_INTR_COALESCE = 1
  PARAMETER C_OPB_CLK_PERIOD_PS = 15000
  PARAMETER C_BASEADDR = 0xC0000000
  PARAMETER C_HIGHADDR = 0xC0003FFF
  PORT OPB_Clk = sys_clk
  PORT OPB_Rst = sys_rst
  PORT PHY_col = ETH_COL
  PORT PHY_crs = ETH_CRS
  PORT PHY_Mii_clk = ETH_MDC
  PORT PHY_Mii_data = ETH_MDIO
  PORT PHY_rx_clk = ETH_RXC
  PORT PHY_rx_data = ETH_RXD
  PORT PHY_dv = ETH_RXDV
  PORT PHY_rx_er = ETH_RXER
  PORT PHY_tx_clk = ETH_TXC
  PORT PHY_tx_data = ETH_TXD
  PORT PHY_tx_en = ETH_TXEN
  PORT PHY_tx_er = ETH_TXER
  PORT PHY_rst_n = PHY_RESETn
  PORT Freeze = net_gnd
  PORT IP2INTC_Irpt = ethernet_interrupt
  BUS_INTERFACE MSOPB = d_opb_v20
END



# Timespecs and output constraints for ethernet
NET "eth_rxc" TNM_NET = "RXCLK_GRP";
NET "eth_txc" TNM_NET = "TXCLK_GRP";
TIMESPEC "TSTXOUT" = FROM "TXCLK_GRP" TO "PADS" 10 ns;
TIMESPEC "TSRXIN" = FROM "PADS" TO "RXCLK_GRP" 6 ns;
NET "eth_rxc" USELOWSKEWLINES;
NET "eth_txc" USELOWSKEWLINES;
NET "eth_txc" MAXSKEW= 2.0 ns;
NET "eth_rxc" MAXSKEW= 2.0 ns;
NET "eth_rxc" PERIOD = 40 ns HIGH 14 ns;
NET "eth_txc" PERIOD = 40 ns HIGH 14 ns;
NET "eth_rxd<3>" NODELAY;
NET "eth_rxd<2>" NODELAY;
NET "eth_rxd<1>" NODELAY;
NET "eth_rxd<0>" NODELAY;
NET "eth_rxdv" NODELAY;
NET "eth_rxer" NODELAY;
# NET "eth_crs_dv" NODELAY;
NET "eth_col" NODELAY;
NET "eth_txc" TNM_NET = "eth_txc";
NET "eth_rxc" TNM_NET = "eth_rxc";

What sort of MHS setup are you using for PPC/linux/ethernet projects?  I 
assume you've had it going with the P160 comms module on an insight board?

thanks,

John


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