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Re: [microblaze-uclinux] Caches

Hi Jan,

Schunke Jan-Hendrik wrote:
> Does anbody have a running uclinux on microblaze with caches enabled? We
> have a hard time to get them running. The Kernel hangs (See boot log
> below):

I use them both (icache and dcache) all the time.  The dcache had a bug 
in EDK3.2 (to do with byte-wide fetches), however it all works well in 6.1.

> Calibrating delay loop... 24.83 BogoMIPS

What's your clock speed?  My board (at 66mhz) reports about 33 bogoMIPs...

> The caches are enabled in the MHS like this:
> 
 >  PARAMETER C_USE_ICACHE = 1
 >  PARAMETER C_CACHE_BYTE_SIZE = 65536
 >  PARAMETER C_USE_DCACHE = 1
 >  PARAMETER C_DCACHE_BYTE_SIZE = 65536

 >  PARAMETER C_ADDR_TAG_BITS = 9
 >  PARAMETER C_DCACHE_ADDR_TAG = 9

> Any suggestions about what to change are welcome.

I think I see the problem.  The cache size in the kernel is hardcoded to 
16K (see linux/include/asm-microblaze/pgalloc.h).  You've increased the 
physical cache size, but the kernel doesn't know that, and is failing to 
properly invalidate the instruction cache after the kernel loads an 
executable.

Fix should be easy - first make sure you are up to date with CVS, as I 
made some changes last week that greatly improve performance, then edit 
this file.  Line 29, change the cache size from 0x8000 to 0x10000 and 
you should be right.  This parameter should move into xparameters.h - 
I'll do it today and submit it to the CVS! :)

Regards,

John

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