RE: [microblaze-uclinux] Caches

["Hansen Eric" <hansen@xxxxxxxxxxxxxxxxxxxx>]

>> Calibrating delay loop... 24.83 BogoMIPS

> What's your clock speed?  My board (at 66mhz) reports about 33
bogoMIPs...

Out clock speed is 50 MHz for the moment

> >  PARAMETER C_USE_ICACHE = 1
> >  PARAMETER C_CACHE_BYTE_SIZE = 65536
> >  PARAMETER C_USE_DCACHE = 1
> >  PARAMETER C_DCACHE_BYTE_SIZE = 65536

> >  PARAMETER C_ADDR_TAG_BITS = 9
> >  PARAMETER C_DCACHE_ADDR_TAG = 9


> I think I see the problem.  The cache size in the kernel is hardcoded
to 
> 16K (see linux/include/asm-microblaze/pgalloc.h).  You've increased
the 
> physical cache size, but the kernel doesn't know that, and is failing
to 
> properly invalidate the instruction cache after the kernel loads an 
> executable.

> Fix should be easy - first make sure you are up to date with CVS, as I

> made some changes last week that greatly improve performance, then
edit 
> this file.  Line 29, change the cache size from 0x8000 to 0x10000 and 
> you should be right.  This parameter should move into xparameters.h - 
> I'll do it today and submit it to the CVS! :)

Funny thing. I have had already set cache size to 0x10000. Id did not
work.
But when looking at your MHS from mbvanilla_net_v1_00_a I found one
thing
I did not understand... Your memory size on the LMB is 16384, which is
4000 in hex.
Nevertheless you set size to 8000? As we have got 4 times as much memory
on
the LMB do we have to set memory size to 20000? Currently I have set it
to
10000.

Erik

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