Re: [microblaze-uclinux] [patch] errno corruption (fwd) (fwd)

[John Williams <jwilliams@xxxxxxxxxxxxxx>]

Hi David,

David McCullough wrote:

> I ran this past Paul Dale,  our resident compiler guru,  and here are
> his comments,

Thanks for that, and thanks to Pauli too.

> The clobbers don't sync up with the code.  r5, r6, r12 & r17 look like being
> clobbered.  r0 and r3 don't look properly initialised.  If r3 is a syscall
> return, it should be a clobber too.  r0 == 0 perhaps?  Sorry, if this is
> obvious, I'm not in the slightest bit up to speed on the microblaze :-)

> Also, if you've got a condition codes register and you might alter it, you
> must include "cc" as a clobber.  Even if you don't have such a register (e.g.
> the alpha) it is harmless to include "cc" anyway.  Likewise, if memory is
> modified, include "memory" as a clobber (probably not needed for syscalls
> though).

I added "cc" and "r3" to the generic list of clobbers, and explicilty 
added the relevant (ie used) args regs to the clobbers for each syscall 
definition.

> You might also be able to loosen the constraints on the the asm args if the
> microblaze has other addressing modes.  I.e. there isn't any need to put the
> args and return in registers if the CPU supports rich enough third operand
> addressing modes.  "g" is a good mode (general memory/immediate/register) if
> possible.  I imagine "ri" would be safe.

Alas not for microblaze, since AFAIK the addressing mode is explicit in 
the opcode used.  addi is always "addi rd, ra, imm".  add is always "add 
rd, ra, rb" and so on.  If this is wrong, someone please correct me.

I'll posted a modified version of Yashi's patch back in the main thread.

Cheers,

John


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