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Re: [microblaze-uclinux] OT?, Performance
Jivin John Williams lays it down ...
> emanuel stiebler wrote:
> >Goran Bilski wrote:
> >
> >>Another way to improve the numbers is to use the harvard architecute
> >>of MicroBlaze and have 2 OPB busses and two external memories.
> >
> >
> >But we can't support it on the uclinux ...
>
> That's not strictly true... it would just require some (major?) work in
> the kernel, to support two memory pools - one for data, and one for
> code, and in the hardware we'd instantiate bridges so that we are able
> to write into code space.
>
> Not trivial, but certainly doable I think.
page_alloc2 in the 2.4 kernel can currently manage 2 pools of memory,
uses a GFP_SPECIAL flag to allocate from the "special" pool ;-)
I didn't write it, but I think it was a hack to allow access to fast
SRAM on some platforms.
Cheers,
Davidm
--
David McCullough, davidm@snapgear.com Ph:+61 7 34352815 http://www.SnapGear.com
Custom Embedded Solutions + Security Fx:+61 7 38913630 http://www.uCdot.org
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- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance
- Re: [microblaze-uclinux] OT?, Performance