Hi Nizar, Nizar Sakr wrote: > I read your paper entitled, *“Embedded Linux as a platform for > dynamically self-reconfiguring systems-on-chip” *and I must say it’s > very interesting! In my research group at the University of Ottawa > (Canada), we are working on a reconfigurable co-processor and I’m > currently using the HWICAP peripheral to Self-reconfigure the FPGA on > which the Co-processor will reside. About your ucLinux driver, in one of > your previous emails you say that you don’t mind sharing your ucLinux > driver, do you have a website from which I can download it? I'm glad you enjoyed the paper, it was certainly fun doing it. I had planned to tidy the driver up before releasing it, but other priorities took over. With that in mind, see the attached archive that contains both my "adapter code" and the low level opb_xhwicap driver sources. In the uClinux context it should be decompressed into the linux-2.4.x/drivers/char/misc/ subdirectory. Some other small tweaks are necessary to integrate it into the uClinux build context - let me know if that's what you are trying to do, or if you are just interested in the source code. Note the licensing status of this driver is a bit grey. I assert copyright, and release under the GPL, the adapter.c which is a wrapper over the Xilinx low-level driver code, and the linux kernel. Xilinx' copyright notice in their low-level driver code is silent about redistribution restrictions. It's been no problem in the past, but I cannot guarantee this. For research purposes I'm sure there is no problem. > Furthermore, I started working on the reconfiguration of the > co-processor implementation about a month ago, and currently I’m trying > to create partial-bitstreams in order to test the HWICAP and I must say > creating bitstream according the appnote 290 is a hassle. In your paper > you mention the following: [snip]. This is indeed the unpleasant end of partial reconfiguration research. For now, there is really no way around the approach(es) described in XAPP290. The following paragraph which you quote, refers to my efforts to morph the Microblaze/EDK build output into a structure that can be processed in the manner described in XAPP290. > “To implement and test our examples above, we used partial bit streams > laboriously hand-created using the Xilinx FPGA Editor tool. This is > partly because the modular and partial reconfiguration implementation > flows are not supported for Microblaze and EDK (Embedded Development > Kit) projects. We have recently successfully “modularised” the > Microblaze flow, and are in the process of automating this, so that > reconfigurable modules may be easily specified, and interfaced to > Microblaze processor systems.” > Would you be able to give me some advice > on how to easily create reconfigurable modules/partial-bitstreams, any > examples? All I can really suggest is make sure you go through xapp290 several times, make sure you understand every step of the partial reconfiguration flow. Things re: microblaze and modularisation / partial flow are improving slowly - e.g. in recent releases of EDK, the separate microblaze system "components" are at least synthesised into individual subdirectories (implementation/XXX/), so that makes your job a little bit easier in the partial flow. Also there was a bit of buzz a few months ago at xilinx.openchip.org on building modularised microblaze systems, don't know if it ever went anywhere though. Hope this is helpful. Let me know if you need some assistance getting the driver going - no-one other than me has ever used it, so there's probably some gremlins lurking in there! Regards, John
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