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Re: [microblaze-uclinux] microblaze clock freq and ethernet
Anand,
The 65 Mhz requirement is purely hardware (ethernet MAC) the clock on
the ethernet side is getting recovered from the incoming ethernet
signal, by the means of the PHY chip (external to the FPGA) and is
crossing the clock domain (ETH clock --> internal clock) by using fifos
in the FPGA - the 65 Mhz constraint it comes from the fact that the
system need to keep up the speed with the incoming ethernet data stream.
in theory if your network is ETH 10Mb/s only should work, this means
that you do NOT HAVE ANY traffic at 100Mb not even sync packets from
switches/hubs (you can try to hook the board with a PC with a crossover
cable and force the network card to the PC to 10Mb)
Another experiment is to try to force the Ethernet MAC (Xilinx) to work
on 10Mb only - I'm not sure how but it must be an internal register and
a function in the driver to do so.
Hope this helps,
Aurash
On Mon, 2004-09-06 at 12:34, anand_12 wrote:
> hi all
>
> I am running uClinux on the memec spartan 2 E board(microblaze softcore).
>
> Currently the clock frequency of MicroBlaze I am using is 66 MHz which is necessary for 100 Mbps ethernet(according to MicroBlaze design document,actually it says >65 <100 Mhz)
>
> I reduced the clock freq to 50 Mhz and when I compile the kernel and execute it on board,it boots up properly but the ethernet does not seem to work...i am not able to ping either to the board or from the board to any other host on the network...
>
> i am not very particular of a 100 Mbps ethernet connection...even 10 Mbps would do(for this case the minimum clock freq is 6.5 Mhz,as per the design doc)
>
> what i want to know is :
>
> -> should any changes be made to the kernel configuration /header files/etc ?..what i have done now just change the CPU clock frequency to 50 Mhz.
>
> Thanks in advance for any help
>
> cheers
> V.Anand
> (www.tenet.res.in)
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