[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [microblaze-uclinux] problems booting kernel
hi. thanks for the quick reply. I came in tonight to have a quick
look, but no luck.
I am indeed using 6.2i, just to clarify.
I tried your suggestion below about stopping the debugger, but that
doesn't seem to make any difference. as soon as I start it running at
0x80000000 it just goes away.
I believe the problem is that even after the download, the memory is all 0s.
I did: mrd 0x80000000 64 before the dow -data, and it was all 0s.
and after the dow, it is still all 0s.
I used both my own image.bin, and even the demo.bin, just for a sanity
check. The memory always stays as 0s!
I tried downloading it to 0x40000000, and the same deal. It stays as
what it was previously.
The memory even refuses to change with mwr!
Is there any chance that this could be some sort of licensing issue?
We may not have our licenses configured correctly for the MB. I
remember seeing some sort of evaluation message when synthesizing
mb_vanilla. This may take a few days to get resolved, so I'd like to
have reasonable assurance before I request a reinstall.
Is there any chance some kind soul could email me their mb_vanilla for
this board, and/or their kernel image? I'm trying to rule out as many
things as possible...
my other notion was if I missed some config item to get it working
with JTAG? The documentation *seems* to lean towards dual serial, but
it appears to be working with JTAG, the processor is getting
downloaded ok, and jboot comes up on the serial terminal.
again, thanks to everyone that read this post.
jc
On Sun, 21 Nov 2004 11:46:24 +0000, aurash <aurelian.lazarut@ntlworld.ie> wrote:
> Hi JC,
>
> see inline
>
>
>
> John Carter wrote:
>
> >Hi everyone, I'm new to the list, and have been working on this
> >problem for the past week or so.
> >
> >I've scanned thru the lists and documentation, and haven't had much
> >luck. I have a sneaky suspicion it is a real forehead slapper, but
> >seem to missing something.
> >
> >Basically, I have the MB on the board, and when I download the kernel,
> >nothing happens.
> >
> >Notes:
> >I've followed thru the documention on Dr. William's site, and have
> >built everything thus far.
> >
> >Due to configuration issues in my lab, I am using the Windows EDK
> >(6.1) to download images. I built everything under linux, but don't
> >have rights to the serial ports.
> >
> I'm not sure what you mean with EDK 6.1 your log file from XMD looks
> like 6.2
> can you clarify this please
>
>
>
> >
> >I have the V2MB1000 Board. I believe I have rev3 (it has green LEDs),
> >and user's guide says "Ver 3.0".
> >
> >I am basing most of my process on the online William's documentation,
> >the demo, and a tiny bit from EDK provided documentation.
> >
> >All the jumpers are in their default position.
> >
> >The communications board is attached.
> >
> >I am using a parallel JTAG to download the mb to the board, and a
> >serial off the primary 232 for my terminal.
> >
> >--
> >
> >1. Used impact tool to download mbvanilla (download.bit) to the board.
> >I selected the xc18v04_vq44.bsd file for the prom chip, and
> >download.bit (from mb_vanilla) for the xc2v1000.
> >
> looks ok so far
>
>
>
> >
> >Hyperterminal comes alive and shows the jboot menu:
> >
> >J-Boot Menu
> >-----------
> >
> >1. Execute Flash image
> >2. Execute RAM image
> >3. Erase Flash
> >4. Write image into Flash
> >5. Set kernel cmdline
> >
> >Make your choice>
> >
> >At this point I open up xmd:
> >
> >H:\unpublic\uclinux\uClinux-dist\images>xmd
> >Xilinx Microprocessor Debug (XMD) Engine
> >Xilinx EDK 6.2.1 Build EDK_Gm.12.3
> >Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
> >XMD% xload mhs H:\\unpublic\\uclinux\\mbvanilla_net_6_20_a\\system.mhs
> >Processors in System (\\bud.cis.uoguelph.ca\u1\grad\jcarter\unpublic\uclinux\mbv
> >anilla_net_6_20_a\system.mhs)::
> > Microblaze-MDM(1) : microblaze_0
> >XMD% mbc mdm
> >
> >JTAG chain configuration
> >--------------------------------------------------
> >Device ID Code IR Length Part Name
> >1 05026093 8 XC18V04
> >2 01028093 6 XC2V1000
> >Assuming, Device No: 2 contains the MicroBlaze system
> >Connected to the JTAG MicroBlaze Debug Module (MDM)
> >No of processors = 1
> >
> >MicroBlaze Processor 1 Configuration :
> >-------------------------------------
> >Version............................2.00.a
> >No of PC Breakpoints...............4
> >No of Read Addr/Data Watchpoints...1
> >No of Write Addr/Data Watchpoints..1
> >Instruction Cache Support..........on
> >Data Cache Support.................on
> >MB-FSL-MDM Connected...............Yes
> >JTAG MDM Connected to Mircoblaze 1
> >Connected to MicroBlaze "mdm" target. id = 0
> >Starting GDB server for "mdm" target (id = 0) at TCP port no 1234
> >XMD%
> >
> >I can start the processor back up, and it is still running jboot just fine..
> >
> >Next I download image.bin which I built myself (I have also replacing
> >it with the demo as well, and it also does nothing for me).
> >
> >dow -data image.bin 0x80000000
> >
> >
> >it takes about 90 seconds, and comes back to a prompt.
> >
> >
> after this step, exit XMD and start again (this is due to a bug - very
> likely was fixed in this version, but it worth to try this way first)
> and type in the new XMD sesion (after you reconnect with MB) the
> following command (which will run the code located in external memory at
> 0x80000000)
>
> con 0x80000000
>
> and see what's the story
>
> >Dumping the memory before and after the download shows that nothing has changed.
> >
> >If I press the program button, all the memory turns to: 3FFFFFFF
> >
> >I tried changing 0x80000000 by hand, and it will not let me.
> >I have the 4 meg version (xc18v04) which I thought was the largest.
> >
> >
> you are making a confusion here: (or two)
> 0x80000000 refers to your DDR RAM (external memory 32MB )
> and XC18V04 it a dedicated flash to store the bitstream (config for
> FPGA) and it has a side of 4Mb (Mb=Mega bits)
> the XC18V04 is not visible from within the system (let's say it keeps
> the hardware side of the system)
>
> >I tried changing lower memory addresses, and I can change and read them fine.
> >
> >I also tried downloading the image (and the demo) to 0x00000000 and it
> >will change
> >
> will not work from 0x00000000
>
> >the contents, but when I set the program counter (rwr 32 0x00000000)
> >and type con
> >it does nothing.
> >
> >
> >It may be something really obvious, and just a lack of knowledge of
> >how to use the program button. (presently I'm not using it for
> >anything).
> >
> prog button is for reconfiguring the FPGA, when you press this button
> the FPGA will "boot" (will download) the bistream from xc18v04, but at
> power on, will do the same - self configuring.
>
> >
> >Any help would be great appreciated!
> >
> >thanks,
> >
> >jc
> >
> >
> >
> Hope this help,
> Aurash
>
> ___________________________
> microblaze-uclinux mailing list
> microblaze-uclinux@itee.uq.edu.au
> Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
> Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/
>
>
--
/* John Carter, BCS
* MSc Student (CIS) - University of Guelph
* email=mrjohndcarter@gmail.com
* site=http://www.jcarter.ca */
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@itee.uq.edu.au
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/