Re: [microblaze-uclinux] FSL question

["Taeweon Suh" <suhtw@xxxxxxxxxxxxxx>]

Thanks, Raj. It's working now.
I can say I spent an whole day to debug this and checked everything but
this (^^;). You saved me a lot of my time. Thanks again.

I got one more question for you. What is the relationship between FSL and
Debug inferfaces?
I mean when using FSL, do I have to remove debug pins connections (such as
DBG_REG_EN, DBG_CAPTURE, DBG_UPDATE, DBG_TDO) between microblaze and
opb_mdm?
I thought that, in order to use commands like rrd, rwr, mwr etc.., I need
to have debug pin connections, but it turns out I don't need this.
Could you explain about this?
Thanks,

Taeweon


>>
>> BEGIN fsl_v20
>>  PARAMETER INSTANCE = download_link_fsl_v20
>>  PARAMETER HW_VER = 2.00.a
>>  PARAMETER C_EXT_RESET_HIGH = 0
>>  PORT FSL_Clk = sys_rst_s
>>  PORT SYS_Rst = sys_rst_s
>> END
>>
>>
>>
>
> Your FSL clock is connected to Reset.. Connect it to sys_clk_s..
>
> - Raj
>
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> microblaze-uclinux@itee.uq.edu.au
> Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
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> http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/
>
>


----------------------------------------------
Taeweon Suh

Ph.D. Candidate
School of Electrical and Computer Engineering
Georgia Institute of Technology
Atlanta, Georgia USA

Lab: CoC345
Tel: +1-404-385-6273
E-mail: suhtw@ece.gatech.edu
----------------------------------------------

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