Re: [microblaze-uclinux] Problems when porting uClinux to Spartan-3 starter board

[Lin Jyi-Tsuen <lin.jyitsuen@xxxxxxxxx>]

hi john,
many thanks for your  comments/observations.
I defined  CONFIG_XILINX_MICROBLAZE0_USE_ICACHE and
CONFIG_XILINX_MICROBLAZE0_USE_DCACHE to zero.
I hope to disable icache and dcache, do I on the right way ?
Also, I defined CONFIG_XILINX_ETHERNET_NUM_INSTANCES to zero.
I hope to disable Ethernet, too. Is it right?
I am a new guy to uClinux and Microblaze.
but  the console shows nothing, after the kernel start.
so I am try to find the way to debug.....

it halt at 
mm/init.c , function : find_bootmap_pfn( ) , 
	start_pfn   = V_PFN_UP(_ramstart);
	bootmap_pfn = 0;

I will try to find more debug informations..... 
Thanks for your help again!

Best, Regards,
   Lin Jyi-Tsuen.



On Mon, 21 Mar 2005 21:48:18 +1000, John Williams
<jwilliams@itee.uq.edu.au> wrote:
> Hi Lin,
> 
> Lin Jyi-Tsuen wrote:
> >
> > I am porting uClinux to Spartan-3 Starter Board.
> > After I download the image.bin to SRAM via a bootloader.
> > But it doesn't work..
> > Here is the  MSH and config file, Any one can help me ?
> >
> > PS: the base address is 0x80300000.
> 
> A couple of comments/observations, in no particular order:
> 
> 1. You need to connect the uartlite interrupt signal to the interrupt
> controller if you want to use the uClinux UARTlite driver for your console.
> 
> 2. The .config contains entries for a xilinx ethernet controller, yet
> there is no ethernet instance in your MHS file.  This suggests an
> inconsistency between your EDK project (MHS/MSS) and the auto-config.in.
>   Make sure the TARGET_DIR parameter in your system.mss points to the
> correct place in your kernel directory structure, and make sure you do
> "make oldconfig" in your uClinux-dist after updating the auto-config.in
> (ie running libgen).
> 
> 3. Again, there is inconsistency between MHS file and .config (thus
> auto-config.in) on the microblaze processor instance.  hw_ver is
> different, for starters.
> 
> 4. The icache and dcache ranges on your microblaze don't overlap with
> your memory range.  In fact, it appears that some of your peripheral IO
> ranges are inside the cacheable memory region for microblaze.  This is
> guaranteed to cause problems!
> 
> 5. To be useful, we need a better problem description than "it doesn't
> work".
> 
> Hope this helps
> 
> John
> 
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