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RE: [microblaze-uclinux] optimized memcpy() based on DMA transfer
Hi John, Falk,
The OPB Central DMA does have a 16 word buffer. OPB does not have
burst, but does have something similar "sequential addressing", so I
would expect some speedup for peripherals that could make use of it such
as DDR, as the latency for DDR / SDRAM us usually for the first
transaction - subsequent transactions typically can take a lot less
time, if sequential addressing is used.
Best regards
Kris
--
------------------------------------------------------------------------
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/ /\/ Kris Chaplin
\ \ Application Engineer - Embedded Processors
/ / Xilinx Europe
\_\/\ +44 (0)870-7356-563
-----Original Message-----
From: owner-microblaze-uclinux@itee.uq.edu.au
[mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of John
Williams
Sent: 30 March 2005 22:15
To: microblaze-uclinux@itee.uq.edu.au
Subject: Re: [microblaze-uclinux] optimized memcpy() based on DMA
transfer
Hi Falk,
Brettschneider Falk wrote:
> has someone implemented a specially optimized version of memcpy() or
similar
> that uses DMA to put the data in the SDRAM, probably on sizes >
minimum? I
> suppose the current memcpy() just passes DWORD by DWORD by bus...
I've thought about it, and when I googled it a while ago, it was clear
that many others had as well :)
For microblaze systems with no ICACHE, it might make sense, but
otherwise you'd really have to wonder how much improvement would be
made. The inner loop of the optimised memcpy would be in cache,
executing at 2 cycles per instruction, it's the OPB latency
(reading/writing to/from the OPB_SDRAM/DDR) controller that will become
the limiting factor.
AFAIK EDK's standalone DMA engine has no internal buffering, and does
not do burst transfers - it's essentially just a programmable
OPB-talking state machine. For memory to memory transfers, I don't
think you'd win. However, it would still be an interesting experiment,
and pretty quick to try out. Another example of experimental computer
architecture!
John
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