RE: [microblaze-uclinux] auto-config, Spartan 3 (xc3s400)

["Carr, Vincent" <Vincent.Carr@xxxxxxxxxxx>]

Hi John,

Here are the fragments from the MHS and MSS file.  I've attached
complete files also.

From MSS file..
	BEGIN OS
	 PARAMETER OS_NAME = uclinux
	 PARAMETER OS_VER = 1.00.a
	 PARAMETER PROC_INSTANCE = microblaze_0
	 PARAMETER stdout = RS232
	 PARAMETER stdin = RS232
	 PARAMETER main_memory = SRAM_256Kx32_FLASH_2Mx32
	 PARAMETER flash_memory = SRAM_256Kx32_FLASH_2Mx32
	 PARAMETER lmb_memory = ilmb_cntlr
	END

From MHS file..
	BEGIN opb_emc
	 PARAMETER INSTANCE = SRAM_256Kx32_FLASH_2Mx32
	 PARAMETER HW_VER = 1.10.b
	 PARAMETER C_OPB_CLK_PERIOD_PS = 20000
	 PARAMETER C_NUM_BANKS_MEM = 2
	 PARAMETER C_DEV_MIR_ENABLE = 0
	 PARAMETER C_MAX_MEM_WIDTH = 32
	 PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 0
	 PARAMETER C_SYNCH_MEM_0 = 0
	 PARAMETER C_MEM0_WIDTH = 32
	 PARAMETER C_READ_ADDR_TO_OUT_SLOW_PS_0 = 90000
	 PARAMETER C_WRITE_ADDR_TO_OUT_SLOW_PS_0 = 85000
	 PARAMETER C_WRITE_MIN_PULSE_WIDTH_PS_0 = 55000
	 PARAMETER C_READ_ADDR_TO_OUT_FAST_PS_0 = 90000
	 PARAMETER C_WRITE_ADDR_TO_OUT_FAST_PS_0 = 85000
	 PARAMETER C_READ_RECOVERY_BEFORE_WRITE_PS_0 = 0
	 PARAMETER C_WRITE_RECOVERY_BEFORE_READ_PS_0 = 0
	 PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_1 = 0
	 PARAMETER C_SYNCH_MEM_1 = 0
	 PARAMETER C_MEM1_WIDTH = 32
	 PARAMETER C_READ_ADDR_TO_OUT_SLOW_PS_1 = 90000
	 PARAMETER C_WRITE_ADDR_TO_OUT_SLOW_PS_1 = 100000
	 PARAMETER C_WRITE_MIN_PULSE_WIDTH_PS_1 = 50000
	 PARAMETER C_READ_ADDR_TO_OUT_FAST_PS_1 = 90000
	 PARAMETER C_WRITE_ADDR_TO_OUT_FAST_PS_1 = 100000
	 PARAMETER C_READ_RECOVERY_BEFORE_WRITE_PS_1 = 0
	 PARAMETER C_WRITE_RECOVERY_BEFORE_READ_PS_1 = 0
	 PARAMETER C_BASEADDR = 0x81000400
	 PARAMETER C_HIGHADDR = 0x810005ff
	 PARAMETER C_MEM0_BASEADDR = 0x81100000
	 PARAMETER C_MEM0_HIGHADDR = 0x811fffff
	 PARAMETER C_MEM1_BASEADDR = 0x81800000
	 PARAMETER C_MEM1_HIGHADDR = 0x81ffffff
	 BUS_INTERFACE SOPB = mb_opb
	 PORT OPB_Clk = sys_clk_s
	 PORT Mem_A = fpga_0_SRAM_256Kx32_FLASH_2Mx32_Mem_A_split
	 PORT Mem_BEN = fpga_0_SRAM_256Kx32_FLASH_2Mx32_Mem_BEN
	 PORT Mem_WEN = fpga_0_SRAM_256Kx32_FLASH_2Mx32_Mem_WEN
	 PORT Mem_DQ = fpga_0_SRAM_256Kx32_FLASH_2Mx32_Mem_DQ
	 PORT Mem_OEN =
MEM_OEN_And_Gate_Op1_SRAM_256Kx32_FLASH_2Mx32_Mem_OEN
	 PORT Mem_CEN = fpga_0_SRAM_256Kx32_FLASH_2Mx32_Mem_CEN
	 PORT Mem_RPN = fpga_0_SRAM_256Kx32_FLASH_2Mx32_Mem_RPN
	END

Thanks,
Vincent
 

-----Original Message-----
From: owner-microblaze-uclinux@itee.uq.edu.au
[mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of John
Williams
Sent: 18 June 2005 02:03
To: microblaze-uclinux@itee.uq.edu.au
Subject: Re: [microblaze-uclinux] auto-config, Spartan 3 (xc3s400)

Hi Vicent,

Carr, Vincent wrote:

> /usr/local/microblaze_elf_tools/bin//mb-ld.real: region ERAM is full 
> (linux section .text)
> /usr/local/microblaze_elf_tools/bin//mb-ld.real: region ERAM is full 
> (linux section .sdata2)

[snip]

> Are there some microblaze core configuration parameters in the EDK 
> that need tweaking to overcome this error? The Linux.ld file is
attached.

from linux.ld

MEMORY {
	LMB  : ORIGIN = 0x00000000 ,
	       LENGTH = 0x00002000
	ERAM  : ORIGIN = 0x81000400 ,
                 LENGTH = 0x00000200
}

Hmmm, the ERAM length of only 0x200 suggests that your "PARAMETER
main_memory" entry in the uClinux OS section of the MSS is pointing to
the register window of the memory controller, rather than the actual
banks of memory that it controls.

You you post the OS section of your MSS file, and the fragment of your
MHS file that defines your main external memory controller (DDR/EMC or
whatever)?

Thanks,

John


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Attachment: system.mhs
Description: system.mhs

Attachment: system.mss
Description: system.mss