Re: [microblaze-uclinux] Power Management?

[John Williams <jwilliams@xxxxxxxxxxxxxx>]

Hi Errol,

Errol Terblanche wrote:

> Just for interest’s sake, has anybody looked at power management? I have 
> seen speculation about clock management, but I’m more interested in 
> Suspend To Ram to power-off the whole board except DRAM.
> 
> I’m busy designing a custom board and I’m wondering if I should add the 
> possibility to power down things like the VCCint and VCCaux (even 
> VCCio?) to facilitate STR…
> 
> Any thoughts on this?

I might be missing something here, but presumably the DRAM controller is 
implemented in the FPGA, and so powering it down would stop the needed 
refresh cycles on the DRAM?

Is there such a thing as self-refreshing DRAM?  Or maybe you could put 
the DRAM controller in a CPLD, and interface that to the FPGA, and, 
and...  seems to get complicated pretty quickly.

Cheers,

John
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