RE: [microblaze-uclinux] why such idiv latency of 34 cycles?

[Brettschneider Falk <fbrettschneider@xxxxxxxxxxxxxxxxx>]

Hi Göran,

> -----Original Message-----
> From: owner-microblaze-uclinux@itee.uq.edu.au
> [mailto:owner-microblaze-uclinux@itee.uq.edu.au]On Behalf Of Goran
> Bilski
> 
> Sure but there are tons of other feature wanted for MicroBlaze.
> When I was about to implement the divider, I was thinking of 
> doing a radix-4 SRT algorithm since I done it before. It does 
> 2 bits per clock cycle.
> The division would take 18 clock cycles instead of 34. 
> However the logic is also much larger and at that time I 
> couldn't justify that.
> 
> If anyone has requirements or a wishlist for MicroBlaze, 
> please send them to me. We have internally a long list of 
> things to do but I suspect that we also are missing some 
> stuff. Also if you wish stuff that are further down our list 
> it might be moved up.
> 
> Falk, Could you send me some more details on the algorithm?
See
http://www.baumeroptronic.de/frameset.php?PageName=P2_Smart%20Vision_neu&Lan
guage=en

Object recognition and subsequent processing using contour lines recognized
in real-life images.
Most things are running directly in the FPGA where fast image processing can
be done really in parallel.
Some userscript-controlled things remain for the µBlaze, programmed as C
application in the µLinux userspace.
Hard to describe details there. Anyway, common mathematics uses integer
division all around.

CU
F@lk

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