RE: [microblaze-uclinux] Clock Incongruity

["David Banas" <dbanas@xxxxxxxxxxxxxx>]

Hi Andy,

The 20 MHz clock is the input to the ICS511 Clock Multiplier, NOT the FPGA.
And, the minimum multiplication factor available on the '511 is x2, which is
why 40 MHz is the minimum selectable clock frequency available in the
pull-down.

See the section entitled, "Oscillator", on p. 8 of the User's Manual for
more detail. Also, don't forget that you have the option to use your own
oscillator, placed into the socket "U9", instead of the clock multiplier, if
you wish. (That is, both the clock multiplier output, as well as the output
from U9 get fed to FPGA clock pins.)

Hope that helps,

David Banas
Field Applications Engineer
Nu Horizons Electronics Corp.
2070 Ringwood Avenue
San Jose, CA 95131
(408)434-0800 - office
(415)846-5837 - cell
http://www.nuhorizons.com

> -----Original Message-----
> From: owner-microblaze-uclinux@itee.uq.edu.au [mailto:owner-microblaze-
> uclinux@itee.uq.edu.au] On Behalf Of Abot Botbot
> Sent: Wednesday, September 14, 2005 8:18 AM
> To: microblaze-uclinux@itee.uq.edu.au
> Subject: [microblaze-uclinux] Clock Incongruity
> 
> Hello Folks,
> 
>    I have a question involving the final running clock frequency on the
> Microblaze. I am using a pretty strange platform, a Nu-Horizons S3-400. It
> has a 20 MHz crystal oscillator as its input clock. In EDK when I set up
> my
> hardware in BSB, one of the first things it asks is the Reference Clock
> Frequency. This pulldown has no option for a 20 Mhz clock input, in fact
> 40
> MHz is as low as it goes. Is this a design lmiting factor? Could this mean
> that the microblaze thinks its taking its 50 MHz clock input to get its
> 100
> MHz core clock, that it really is getting a 40 MHz clock? I will include
> my
> MSS and MHS files if they are of any concequence.
> 
> Thanks,
> Andy
> 
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