[microblaze-uclinux] FSL_M_FULL

["Adrian Wee Chin Mun" <cmwee@xxxxxxxxxxxxxx>]

Hi there,
	I am working on hardware linked to the microblaze with FSL ports.
The FSL Slave interface on my hardware seems to be working fine and the FSL
Master interface also works in most cases. However, I seem to be facing a
problem when the buffer on the FSL slave interface on the microblaze gets
filled up.
	I am using default settings for the FSL with

C_ASYNC_CLKS = 0
C_IMPL_STYLE = 0
C_FSL_DWIDTH = 32
C_FSL_DEPTH = 16

Which is a non BRAM implementation with a 16x32 buffer. Everything works
fine as long as the buffer on the microblaze FSL slave is not full. However
once it is full, it seems to hang my hardware. I have designed the hardware
to mimic exactly the response from the datasheet (handles FSL_M_FULL) and I
have tested it for many cases by asserting the FSL_M_FULL with ModelSim and
it behaves predictably on simulation. However it doesn't seem to work on the
FPGA.
	I would be grateful if anyone can give me some advice on this matter
:)

Thank you
Adrian

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