[microblaze-uclinux] [OT] OPB_SDRAM

["Kevin Somervill" <kevin.m.somervill@xxxxxxxx>]

Hello,
My apoligies for the off-topic question here, but I am looking into a bug(?)
in the opb_sdram controller (not ddr).  Have any of you used this with sdram
that has a column address width greater than 10?  I am using an elpida part
(64Mx8) which has a col address width of 11 (missed it by that much), and
the core doesn't skip the 10 bit like it should.  I think I have fixed
(hacked) the source to correct this issue, but I am surprised no one else
has seen this.  Any thoughts or comments?

A similar issue is had with the 512Mbit sdram from Micron.

Thanks,
./ks

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