RE: [microblaze-uclinux] Spartan3E board and u-boot question

[John Yin <email4jy@xxxxxxxxx>]

I had the same DDR SDRAM problem on my S3E-SDK board
when using the Xilinx 8.2 tools.  Here is a forward of
a message I got from my FAE.  Based on my tests, it
seems the problem is with BUFG (item 2 on the list). 
This BUFG problem also causes the ethernetlite to
fail; transmits packets, but does not receive packets.
 After applying the fix to the three clocks; system
clk, ethernet TX clk, and ethernet RX clk, I was able
to get a working system.

FYI, I removed the FAE contact information.  Didn't
want him to get bombarded with questions from this
list! :-)

john

> Subject: S3E SK Answer Record Hits
> Date: Tue, 1 May 2007 18:08:19 -0700
> 
> John:
> 
> Here are a couple of AR hits that may explain why
> the memory test fails.
> 
>  
> 
> I don't see how mode pins will affect the memory
> test but you might look
> briefly at this AR.
> 
>
http://www.xilinx.com/xlnx/xil_ans_display.jsp?iCountryID=1
>
<http://www.xilinx.com/xlnx/xil_ans_display.jsp?iCountryID=1&iLanguageID=1&g
>
etPagePath=24015&BV_SessionID=@@@@1006779020.1178067579@@@@&BV_EngineID=cccf
> addkidmlhfgcefeceihdffhdfkf.0>
>
&iLanguageID=1&getPagePath=24015&BV_SessionID=@@@@1006779020.1178067579@@@@&
> BV_EngineID=cccfaddkidmlhfgcefeceihdffhdfkf.0
> 
>  
> 
> You might verify if a BUFG is being inserted.
> 
>
http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1
>
<http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&g
> etPagePath=23812> &iCountryID=1&getPagePath=23812
> 
>  
> 
> Here is a memory parameter that may be incorrectly
> entered by BSB.
> 
>
http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1
>
<http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&g
> etPagePath=24451> &iCountryID=1&getPagePath=24451
> 
>  
> 
> Let me know if either of these AR hits helps out.
> 
>  
> 
> Joel
> 
>  
> 
> 
>  
> 
> 
> 
> 
> Joel Hayashida
> 
> Field Applications Engineer
> 
> 
>  
> 
> 
> Nu Horizons Electronics Corp
--- Leonid <Leonid@xxxxxxxxx> wrote:

> Hi, Stephane:
> 
> On Wednesday, May 09, 2007 11:30 AM Stephane
> Rousseau wrote:
> > I begin to suspect someting with the DDR SDRAM IP
> for the Spartan3E
> Board.
> > I've recreated a small system and used the
> memorytest application, the
> > memory test fails.
> 
> Well, I think I may be able to help you. I've looked
> up my Bugzilla
> issues and have found out I've encountered similar
> issue myself - see
> the relevant quotation below:
> 
> " I have compiled Petalogix reference project,
> located in the
>
.../petalinux-v0.10-rc1/hardware/reference-designs/Xilinx-Spartan3E500-R
> evC-edk81, using EDK 8.1. It appeared that RAM
> doesn't work properly,
> namely bits 5 and 21 stay 0 always, I couldn't set
> them to 1. The
> problem has been resolved by replacing mch_opb_ddr
> v1.00.b by older,
> 1.00.a version. However it makes sense to look into
> the root of the
> problem - we may bump into similar issue working
> with Spartan-3e in
> future.
> 
> It's worth to mention that Petalogix pre-build FPGA
> image, located in
>
.../petalinux-v0.10-rc1/hardware/reference-designs/pre-built/Xilinx-Spar
> tan3E500-RevC/implementation doesn't have such a
> problem
> though it's presumably built from the source above.
> Could be that
> another EDK version has been actually used."
> 
> Try to do the trick I've done (replace the core by
> older version) - see
> what happens.
> 
> John Williams may be interested to know regarding
> this issue as well.
> 
> Thanks,
> 
> Leonid.
> 
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> Project Home Page :
> http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
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>
http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/
> 
> 


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