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Re: [microblaze-uclinux] DMA and cache
- To: microblaze-uclinux@xxxxxxxxxxxxxx
- Subject: Re: [microblaze-uclinux] DMA and cache
- From: "Jim Van Vorst" <jvanvorst@xxxxxxxxx>
- Date: Thu, 2 Aug 2007 19:03:15 -0700
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Hi John,
I'm using 2.6 currently. Am I better off moving to 2.4 until this gets fixed up?
Also, does the u-boot or kernel build care about C_BANK0_HIGHADDR, or is that
just for the bitstream?
thanks,
jim
On 8/2/07, John Williams <jwilliams@xxxxxxxxxxxxxx> wrote:
Hi Jim,
Jim Van Vorst wrote:
> I found an old thread about the
>
>> #if CONFIG_XILINX_UNCACHED_SHADOW
>> ret = (void *)((unsigned) ret | UNCACHED_SHADOW_MASK);
>> #endif
>
>
> trick so scatter-gather DMA can play nicely with caching.
> What is the current status of this? I saw at least one FIX ME note
> in the related code.
2.4 or 2.6 kernel? We've got more work to do in the
2.6 kernel to get
this stuff going properly, but it should be OK in 2.4
> From what I understand, if my ram is 64 megs from 0x3000.0000 to
> 0x33ff.ffff,
> when the network driver needs to allocate dma buffers it will get a range
> from 0x3400.0000 to 0x37ff.ffff which is our of my cached range (assuming
> I'm caching all of ram). Is this correct? Is there some value I have to
> change in the .mhs file to fake out 128 megs?
Yep, that's about the thrust of it. You just double the bus address
window of the memory - so set C_BANK0_HIGHADDR to 0x37ffffff, but leave
the cached range as it stands. Memory accesses abouve the cached region
will resolve outside the cache, and the memory controller will just drop
the high bit of the address. Voila - uncached access to the memory.
Regards,
John
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