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Hi All, We have been trying to boot petalinux 2.4 kernel on the Spartan-3E starter kit board configured for microblaze. The hardware settings are somewhat modified from the standard kit settings(we do not have a flash, and caching is disabled). The u-boot works fine on it. However, on compiling the kernel and trying to run it in DDR, we get the following messages: Linux version 2.4.32-uc0 (dkyadav@nisha) (gcc version 3.4.1 ( PetaLinux 0.20 Bui ld -rc1 050607 )) #5 Mon Aug 20 14:39:01 IST 2007 On node 0 totalpages: 8192 zone(0): 8192 pages. zone(1): 0 pages. zone(2): 0 pages. CPU: MICROBLAZE Kernel command line: ¸ Console: xmbserial on UARTLite Calibrating delay loop... The code hangs after this. We do have the parameter C_USE_MSR_INSTR = 1, as suggested in some other similar posts. The project files (.mhs and .mss) are attached. Regards Gaurav |
# ############################################################################## # Created by Base System Builder Wizard for Xilinx EDK 9.1.02 Build EDK_J_SP2.4 # Tue Jul 03 17:36:24 2007 # Target Board: Xilinx Spartan-3E Starter Board Rev D # Family: spartan3e # Device: XC3S500e # Package: FG320 # Speed Grade: -4 # Processor: Microblaze # System clock frequency: 50.000000 MHz # Debug interface: On-Chip HW Debug Module # On Chip Memory : 16 KB # Total Off Chip Memory : 64 MB # - DDR_SDRAM_32Mx16 = 64 MB # ############################################################################## PARAMETER VERSION = 2.1.0 PORT fpga_0_RS232_DTE_RX_pin = fpga_0_RS232_DTE_RX, DIR = I PORT fpga_0_RS232_DTE_TX_pin = fpga_0_RS232_DTE_TX, DIR = O PORT fpga_0_SPI_FLASH_MISO_pin = fpga_0_SPI_FLASH_MISO, DIR = IO PORT fpga_0_SPI_FLASH_MOSI_pin = fpga_0_SPI_FLASH_MOSI, DIR = IO PORT fpga_0_SPI_FLASH_SCK_pin = fpga_0_SPI_FLASH_SCK, DIR = IO PORT fpga_0_SPI_FLASH_SS_pin = fpga_0_SPI_FLASH_SS, DIR = IO, VEC = [0:3] PORT fpga_0_DDR_SDRAM_32Mx16_DDR_Clk_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_Clk, DIR = O PORT fpga_0_DDR_SDRAM_32Mx16_DDR_Clkn_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_Clkn, DIR = O PORT fpga_0_DDR_SDRAM_32Mx16_DDR_Addr_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_Addr, DIR = O, VEC = [0:12] PORT fpga_0_DDR_SDRAM_32Mx16_DDR_BankAddr_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_BankAddr, DIR = O, VEC = [0:1] PORT fpga_0_DDR_SDRAM_32Mx16_DDR_CASn_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_CASn, DIR = O PORT fpga_0_DDR_SDRAM_32Mx16_DDR_CKE_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_CKE, DIR = O PORT fpga_0_DDR_SDRAM_32Mx16_DDR_CSn_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_CSn, DIR = O PORT fpga_0_DDR_SDRAM_32Mx16_DDR_RASn_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_RASn, DIR = O PORT fpga_0_DDR_SDRAM_32Mx16_DDR_WEn_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_WEn, DIR = O PORT fpga_0_DDR_SDRAM_32Mx16_DDR_DM_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_DM, DIR = O, VEC = [0:1] PORT fpga_0_DDR_SDRAM_32Mx16_DDR_DQS_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_DQS, DIR = IO, VEC = [0:1] PORT fpga_0_DDR_SDRAM_32Mx16_DDR_DQ_pin = fpga_0_DDR_SDRAM_32Mx16_DDR_DQ, DIR = IO, VEC = [0:15] PORT fpga_0_DDR_CLK_FB = ddr_feedback_s, DIR = I, SIGIS = CLK, CLK_FREQ = 100000000 PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = CLK, CLK_FREQ = 50000000 PORT sys_rst_pin = sys_rst_s, DIR = I, RST_POLARITY = 1, SIGIS = RST PORT clk_out = sys_clk_s, DIR = O, SIGIS = CLK, CLK_FREQ = 50000000 PORT opb_epc_0_PRH_Data_pin = opb_epc_0_PRH_Data, DIR = IO, VEC = [0:15] PORT opb_epc_0_PRH_CS_n_pin = opb_epc_0_PRH_CS_n, DIR = O, VEC = [0:0] PORT opb_epc_0_PRH_Rdy_pin = opb_epc_0_PRH_Rdy, DIR = I, VEC = [0:0] PORT opb_epc_0_PRH_Rd_n_pin = opb_epc_0_PRH_Rd_n, DIR = O PORT opb_epc_0_PRH_Wr_n_pin = opb_epc_0_PRH_Wr_n, DIR = O PORT opb_epc_0_PRH_Addr_pin = opb_epc_0_PRH_Addr, DIR = O, VEC = [0:15] BEGIN microblaze PARAMETER INSTANCE = microblaze_0 PARAMETER HW_VER = 6.00.b PARAMETER C_USE_FPU = 0 PARAMETER C_DEBUG_ENABLED = 1 PARAMETER C_NUMBER_OF_PC_BRK = 2 PARAMETER C_AREA_OPTIMIZED = 0 PARAMETER C_USE_BARREL = 1 PARAMETER C_USE_DIV = 1 PARAMETER C_USE_MSR_INSTR = 1 BUS_INTERFACE DLMB = dlmb BUS_INTERFACE ILMB = ilmb BUS_INTERFACE DOPB = mb_opb BUS_INTERFACE IOPB = mb_opb PORT DBG_CAPTURE = DBG_CAPTURE_s PORT DBG_CLK = DBG_CLK_s PORT DBG_REG_EN = DBG_REG_EN_s PORT DBG_TDI = DBG_TDI_s PORT DBG_TDO = DBG_TDO_s PORT DBG_UPDATE = DBG_UPDATE_s PORT INTERRUPT = opb_intc_0_Irq PORT CLK = sys_clk_s END BEGIN opb_v20 PARAMETER INSTANCE = mb_opb PARAMETER HW_VER = 1.10.c PARAMETER C_EXT_RESET_HIGH = 1 PORT SYS_Rst = sys_rst_s PORT OPB_Clk = sys_clk_s END BEGIN opb_mdm PARAMETER INSTANCE = debug_module PARAMETER HW_VER = 2.00.a PARAMETER C_MB_DBG_PORTS = 1 PARAMETER C_USE_UART = 1 PARAMETER C_UART_WIDTH = 8 PARAMETER C_BASEADDR = 0x41400000 PARAMETER C_HIGHADDR = 0x4140ffff BUS_INTERFACE SOPB = mb_opb PORT DBG_CAPTURE_0 = DBG_CAPTURE_s PORT DBG_CLK_0 = DBG_CLK_s PORT DBG_REG_EN_0 = DBG_REG_EN_s PORT DBG_TDI_0 = DBG_TDI_s PORT DBG_TDO_0 = DBG_TDO_s PORT DBG_UPDATE_0 = DBG_UPDATE_s END BEGIN lmb_v10 PARAMETER INSTANCE = ilmb PARAMETER HW_VER = 1.00.a PARAMETER C_EXT_RESET_HIGH = 1 PORT SYS_Rst = sys_rst_s PORT LMB_Clk = sys_clk_s END BEGIN lmb_v10 PARAMETER INSTANCE = dlmb PARAMETER HW_VER = 1.00.a PARAMETER C_EXT_RESET_HIGH = 1 PORT SYS_Rst = sys_rst_s PORT LMB_Clk = sys_clk_s END BEGIN lmb_bram_if_cntlr PARAMETER INSTANCE = dlmb_cntlr PARAMETER HW_VER = 2.00.a PARAMETER C_BASEADDR = 0x00000000 PARAMETER C_HIGHADDR = 0x00007FFF BUS_INTERFACE SLMB = dlmb BUS_INTERFACE BRAM_PORT = dlmb_port END BEGIN lmb_bram_if_cntlr PARAMETER INSTANCE = ilmb_cntlr PARAMETER HW_VER = 2.00.a PARAMETER C_BASEADDR = 0x00000000 PARAMETER C_HIGHADDR = 0x00007FFF BUS_INTERFACE SLMB = ilmb BUS_INTERFACE BRAM_PORT = ilmb_port END BEGIN bram_block PARAMETER INSTANCE = lmb_bram PARAMETER HW_VER = 1.00.a BUS_INTERFACE PORTA = ilmb_port BUS_INTERFACE PORTB = dlmb_port END BEGIN opb_uartlite PARAMETER INSTANCE = RS232_DTE PARAMETER HW_VER = 1.00.b PARAMETER C_BAUDRATE = 38400 PARAMETER C_DATA_BITS = 8 PARAMETER C_ODD_PARITY = 0 PARAMETER C_USE_PARITY = 0 PARAMETER C_CLK_FREQ = 50000000 PARAMETER C_BASEADDR = 0x40600000 PARAMETER C_HIGHADDR = 0x4060ffff BUS_INTERFACE SOPB = mb_opb PORT RX = fpga_0_RS232_DTE_RX PORT TX = fpga_0_RS232_DTE_TX PORT Interrupt = RS232_DTE_Interrupt END BEGIN opb_spi PARAMETER INSTANCE = SPI_FLASH PARAMETER HW_VER = 1.00.e PARAMETER C_FIFO_EXIST = 1 PARAMETER C_INTERRUPT_PRESENT = 0 PARAMETER C_OPB_SCK_RATIO = 64 PARAMETER C_NUM_OFFCHIP_SS_BITS = 4 PARAMETER C_NUM_SS_BITS = 4 PARAMETER C_BASEADDR = 0x42908000 PARAMETER C_HIGHADDR = 0x4290807f BUS_INTERFACE SOPB = mb_opb PORT SPISEL = net_vcc PORT MISO = fpga_0_SPI_FLASH_MISO PORT MOSI = fpga_0_SPI_FLASH_MOSI PORT SCK = fpga_0_SPI_FLASH_SCK PORT SS = fpga_0_SPI_FLASH_SS END BEGIN opb_ddr PARAMETER INSTANCE = DDR_SDRAM_32Mx16 PARAMETER HW_VER = 2.00.c PARAMETER C_OPB_CLK_PERIOD_PS = 20000 PARAMETER C_REG_DIMM = 0 PARAMETER C_DDR_TMRD = 15000 PARAMETER C_DDR_TWR = 15000 PARAMETER C_DDR_TWTR = 1 PARAMETER C_DDR_TRAS = 42000 PARAMETER C_DDR_TRC = 65000 PARAMETER C_DDR_TRFC = 75000 PARAMETER C_DDR_TRCD = 20000 PARAMETER C_DDR_TRRD = 15000 PARAMETER C_DDR_TRP = 20000 PARAMETER C_DDR_TREFC = 70300 PARAMETER C_DDR_TREFI = 7800000 PARAMETER C_DDR_DWIDTH = 16 PARAMETER C_DDR_AWIDTH = 13 PARAMETER C_DDR_COL_AWIDTH = 9 PARAMETER C_DDR_BANK_AWIDTH = 2 PARAMETER C_DDR_ASYNC_SUPPORT = 1 PARAMETER C_NUM_CLK_PAIRS = 1 PARAMETER C_MEM0_BASEADDR = 0x22000000 PARAMETER C_MEM0_HIGHADDR = 0x23FFFFFF BUS_INTERFACE SOPB = mb_opb PORT DDR_Clk = fpga_0_DDR_SDRAM_32Mx16_DDR_Clk PORT DDR_Clkn = fpga_0_DDR_SDRAM_32Mx16_DDR_Clkn PORT DDR_Addr = fpga_0_DDR_SDRAM_32Mx16_DDR_Addr PORT DDR_BankAddr = fpga_0_DDR_SDRAM_32Mx16_DDR_BankAddr PORT DDR_CASn = fpga_0_DDR_SDRAM_32Mx16_DDR_CASn PORT DDR_CKE = fpga_0_DDR_SDRAM_32Mx16_DDR_CKE PORT DDR_CSn = fpga_0_DDR_SDRAM_32Mx16_DDR_CSn PORT DDR_RASn = fpga_0_DDR_SDRAM_32Mx16_DDR_RASn PORT DDR_WEn = fpga_0_DDR_SDRAM_32Mx16_DDR_WEn PORT DDR_DM = fpga_0_DDR_SDRAM_32Mx16_DDR_DM PORT DDR_DQS = fpga_0_DDR_SDRAM_32Mx16_DDR_DQS PORT DDR_DQ = fpga_0_DDR_SDRAM_32Mx16_DDR_DQ PORT Device_Clk90_in = ddr_dev_clk_90_s PORT Device_Clk90_in_n = ddr_dev_clk_90_s_n PORT Device_Clk = ddr_dev_clk_s PORT Device_Clk_n = ddr_dev_clk_s_n PORT DDR_Clk90_in = ddr_clk_90_s PORT DDR_Clk90_in_n = ddr_clk_90_n_s END BEGIN util_vector_logic PARAMETER INSTANCE = devclk_inv PARAMETER HW_VER = 1.00.a PARAMETER C_SIZE = 1 PARAMETER C_OPERATION = not PORT Op1 = ddr_dev_clk_s PORT Res = ddr_dev_clk_s_n END BEGIN util_vector_logic PARAMETER INSTANCE = devclk90_inv PARAMETER HW_VER = 1.00.a PARAMETER C_SIZE = 1 PARAMETER C_OPERATION = not PORT Op1 = ddr_dev_clk_90_s PORT Res = ddr_dev_clk_90_s_n END BEGIN util_vector_logic PARAMETER INSTANCE = ddr_clk90_inv PARAMETER HW_VER = 1.00.a PARAMETER C_SIZE = 1 PARAMETER C_OPERATION = not PORT Op1 = ddr_clk_90_s PORT Res = ddr_clk_90_n_s END BEGIN dcm_module PARAMETER INSTANCE = dcm_0 PARAMETER HW_VER = 1.00.c PARAMETER C_CLK0_BUF = TRUE PARAMETER C_CLK2X_BUF = TRUE PARAMETER C_CLKIN_PERIOD = 20.000000 PARAMETER C_CLK_FEEDBACK = 1X PARAMETER C_EXT_RESET_HIGH = 1 PORT CLKIN = dcm_clk_s PORT CLK0 = sys_clk_s PORT CLKFB = sys_clk_s PORT CLK2X = dcm_0CLK2X PORT RST = net_gnd PORT LOCKED = dcm_0_lock END BEGIN dcm_module PARAMETER INSTANCE = dcm_1 PARAMETER HW_VER = 1.00.c PARAMETER C_CLK0_BUF = TRUE PARAMETER C_CLK90_BUF = TRUE PARAMETER C_CLKIN_PERIOD = 10.000000 PARAMETER C_CLK_FEEDBACK = 1X PARAMETER C_EXT_RESET_HIGH = 0 PORT CLKIN = dcm_0CLK2X PORT CLK0 = ddr_dev_clk_s PORT CLK90 = ddr_dev_clk_90_s PORT CLKFB = ddr_dev_clk_s PORT RST = dcm_0_lock PORT LOCKED = dcm_1_lock END BEGIN dcm_module PARAMETER INSTANCE = dcm_2 PARAMETER HW_VER = 1.00.c PARAMETER C_CLK0_BUF = TRUE PARAMETER C_CLK90_BUF = TRUE PARAMETER C_CLKIN_PERIOD = 10.000000 PARAMETER C_CLK_FEEDBACK = 1X PARAMETER C_EXT_RESET_HIGH = 0 PORT CLKIN = ddr_feedback_s PORT CLK90 = ddr_clk_90_s PORT CLK0 = dcm_2_FB PORT CLKFB = dcm_2_FB PORT RST = dcm_1_lock PORT LOCKED = dcm_2_lock END BEGIN opb_epc PARAMETER INSTANCE = opb_epc_0 PARAMETER HW_VER = 1.00.a # PARAMETER C_PRH1_BASEADDR = 0x44000000 # PARAMETER C_PRH1_HIGHADDR = 0x4400ffff # PARAMETER C_PRH2_BASEADDR = 0x44200000 # PARAMETER C_PRH2_HIGHADDR = 0x4420ffff # PARAMETER C_PRH3_BASEADDR = 0x44400000 # PARAMETER C_PRH3_HIGHADDR = 0x4440ffff PARAMETER C_OPB_CLK_PERIOD_PS = 20000 PARAMETER C_PRH_MAX_AWIDTH = 16 PARAMETER C_PRH_MAX_DWIDTH = 16 PARAMETER C_PRH_MAX_ADWIDTH = 16 PARAMETER C_PRH0_AWIDTH = 16 PARAMETER C_PRH0_DWIDTH = 16 PARAMETER C_PRH0_DWIDTH_MATCH = 0 PARAMETER C_PRH0_RDY_WIDTH = 1000000 PARAMETER C_PRH0_WR_CYCLE = 30000 PARAMETER C_PRH0_RD_CYCLE = 30000 PARAMETER C_PRH_CLK_PERIOD_PS = 20000 PARAMETER C_NUM_PERIPHERALS = 1 PARAMETER C_PRH_CLK_SUPPORT = 0 PARAMETER C_PRH0_SYNC = 0 PARAMETER C_PRH0_CSN_TSU = 6000 PARAMETER C_PRH0_WRN_WIDTH = 20000 PARAMETER C_PRH0_DATA_TSU = 15000 PARAMETER C_PRH0_RDN_WIDTH = 20000 PARAMETER C_PRH0_DATA_TOUT = 10000 PARAMETER C_PRH0_DATA_TINV = 7000 PARAMETER C_PRH0_RDY_TOUT = 30000 PARAMETER C_PRH0_CSN_TH = 6000 PARAMETER C_PRH0_DATA_TH = 10000 PARAMETER C_PRH0_BASEADDR = 0x43e00000 PARAMETER C_PRH0_HIGHADDR = 0x43e0ffff PARAMETER C_PRH1_BASEADDR = 0x44000000 PARAMETER C_PRH1_HIGHADDR = 0x4400ffff PARAMETER C_PRH2_BASEADDR = 0x44200000 PARAMETER C_PRH2_HIGHADDR = 0x4420ffff PARAMETER C_PRH3_BASEADDR = 0x44400000 PARAMETER C_PRH3_HIGHADDR = 0x4440ffff BUS_INTERFACE SOPB = mb_opb PORT PRH_Clk = net_vcc PORT PRH_Rst = net_gnd PORT PRH_CS_n = opb_epc_0_PRH_CS_n PORT PRH_Addr = opb_epc_0_PRH_Addr PORT PRH_Rdy = opb_epc_0_PRH_Rdy PORT PRH_Data = opb_epc_0_PRH_Data PORT PRH_Rd_n = opb_epc_0_PRH_Rd_n PORT PRH_Wr_n = opb_epc_0_PRH_Wr_n END BEGIN opb_timer PARAMETER INSTANCE = opb_timer_0 PARAMETER HW_VER = 1.00.b PARAMETER C_BASEADDR = 0x41C00000 PARAMETER C_HIGHADDR = 0x41C0FFFF PARAMETER C_ONE_TIMER_ONLY = 1 BUS_INTERFACE SOPB = mb_opb PORT OPB_Clk = sys_clk_s PORT Interrupt = opb_timer_0_Interrupt END BEGIN opb_intc PARAMETER INSTANCE = opb_intc_0 PARAMETER HW_VER = 1.00.c PARAMETER C_BASEADDR = 0x41200000 PARAMETER C_HIGHADDR = 0x4120FFFF BUS_INTERFACE SOPB = mb_opb PORT Intr = opb_timer_0_Interrupt&RS232_DTE_Interrupt PORT Irq = opb_intc_0_Irq END
PARAMETER VERSION = 2.2.0 BEGIN OS PARAMETER OS_NAME = petalinux PARAMETER OS_VER = 1.00.b PARAMETER PROC_INSTANCE = microblaze_0 PARAMETER lmb_memory = dlmb_cntlr PARAMETER main_memory = DDR_SDRAM_32Mx16 PARAMETER stdin = RS232_DTE PARAMETER stdout = RS232_DTE PARAMETER main_memory_bank = 0 END BEGIN PROCESSOR PARAMETER DRIVER_NAME = cpu PARAMETER DRIVER_VER = 1.01.a PARAMETER HW_INSTANCE = microblaze_0 PARAMETER COMPILER = mb-gcc PARAMETER ARCHIVER = mb-ar PARAMETER XMDSTUB_PERIPHERAL = debug_module PARAMETER CORE_CLOCK_FREQ_HZ = 50000000 END BEGIN DRIVER PARAMETER DRIVER_NAME = uartlite PARAMETER DRIVER_VER = 1.02.a PARAMETER HW_INSTANCE = debug_module END BEGIN DRIVER PARAMETER DRIVER_NAME = bram PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = dlmb_cntlr END BEGIN DRIVER PARAMETER DRIVER_NAME = bram PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = ilmb_cntlr END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = lmb_bram END BEGIN DRIVER PARAMETER DRIVER_NAME = uartlite PARAMETER DRIVER_VER = 1.02.a PARAMETER HW_INSTANCE = RS232_DTE END BEGIN DRIVER PARAMETER DRIVER_NAME = spi PARAMETER DRIVER_VER = 1.01.a PARAMETER HW_INSTANCE = SPI_FLASH END BEGIN DRIVER PARAMETER DRIVER_NAME = sdram PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = DDR_SDRAM_32Mx16 END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = devclk_inv END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = devclk90_inv END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = ddr_clk90_inv END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = dcm_0 END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = dcm_1 END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = dcm_2 END BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = opb_epc_0 END BEGIN DRIVER PARAMETER DRIVER_NAME = tmrctr PARAMETER DRIVER_VER = 1.00.b PARAMETER HW_INSTANCE = opb_timer_0 END BEGIN DRIVER PARAMETER DRIVER_NAME = intc PARAMETER DRIVER_VER = 1.00.c PARAMETER HW_INSTANCE = opb_intc_0 END