[microblaze-uclinux] some questions

[Sebastian <fatfpga@xxxxxxxxxxxxxx>]

hi

i have some questions not directly related to petalinux but i posted them to some
usergroups and didn't get any answer. so i try it now in this mailing list that helped
me out a lot in the past.

so here are my questions:

1.
i created an embedded system based on the petalinux reference design for spartan-3e1600 and edk 9.1.
i added my own ip which creates some data that is written to a included ipif-readfifo.
i use the ipif-dma s/g controller to transfer the data to the system ddr ram. i've written a testing
program to benchmark the transfer rate. my results are about 16 MByte / s. i've estimated a transfer
rate about 200 mbyte / s if the dma-c uses burst mode an no one else is using the opb.
could it be that the ddr sdram is the bottleneck? i read something about ddr ram burst mode an i think
this isn't enabled in the reference design. can anyone help me out with some information?

2.
in my own ip, i'm filling the fifo with data. once it is full, i want to initialize a dma transfer.
so i have to trigger that transfer from within my userlogic.vhd with writing into the LENGTH register
of the dma controller. how can i achieve this? i cannot write into the dma s/g registers, can i? 

3.
to see how the dma-c transfers the data over the bus, it would be very useful to see all the bussignals.
i read something about the bus functional model testing but i think i need some extra software for this:
chipscope or modelsim? can i simulate without buying this extra software?

thank you in advance for your help!

regards,
sebastian from frankfurt/germany
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