Hi Michal - my .config file is below as requested:
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-uc0
# Thu Nov 6 13:05:08 2008
#
CONFIG_MICROBLAZE=y
# CONFIG_SWAP is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_UID16=y
CONFIG_DEFCONFIG_LIST="arch/$ARCH/defconfig-mmu"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
# CONFIG_SYSVIPC is not set
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE="$(ROOTDIR)/images/rootfs.cpio"
CONFIG_INITRAMFS_ROOT_UID=0
CONFIG_INITRAMFS_ROOT_GID=0
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
# CONFIG_BUG is not set
CONFIG_ELF_CORE=y
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=1
# CONFIG_SLOB is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
#
# Platform options
#
# CONFIG_PCI is not set
# CONFIG_PLATFORM_XILINX_XILINX_SPARTAN3E3400_LLTEMAC_EDK101 is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E1600_REVA_LLTEMAC_EDK101 is not set
CONFIG_PLATFORM_XILINX_SPARTAN3E3400_LLTEMAC_EDK101_MMU=y
# CONFIG_PLATFORM_XILINX_SPARTAN3E3400_LITE_EDK101_MMU is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E1600_REVA_LITE_EDK101_MMU is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E1600_REVA_LITE_EDK101 is not set
# CONFIG_PLATFORM_XILINX_ML505_LL_TEMAC_SGDMA_EDK101 is not set
# CONFIG_PLATFORM_XILINX_ML505 is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E500_MMU is not set
# CONFIG_PLATFORM_XILINX_ML505_MMU is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E1600_MMU is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E500_REVD is not set
# CONFIG_PLATFORM_XILINX_ML506 is not set
# CONFIG_PLATFORM_XILINX_ML501 is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E1600_REVA_SGDMA is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E1600_REVA is not set
# CONFIG_PLATFORM_XILINX_SPARTAN3E500_REVC is not set
# CONFIG_PLATFORM_MICROBLAZE_AUTO is not set
# CONFIG_PLATFORM_XILINX_ML401 is not set
# CONFIG_PLATFORM_XILINX_S3E1600_STARTER is not set
# CONFIG_ALLOW_EDIT_AUTO is not set
CONFIG_PROJECT_NAME="Xilinx-Spartan3E3400-lltemac-edk101-MMU"
CONFIG_XILINX_ERAM_START=0x20000000
CONFIG_XILINX_ERAM_SIZE=0x10000000
CONFIG_XILINX_FLASH_START=0x8c000000
CONFIG_XILINX_FLASH_SIZE=0x02000000
CONFIG_XILINX_FLASH_WIDTH=16
CONFIG_XILINX_FLASH_DATAWIDTH_MATCHING=1
CONFIG_XILINX_LMB_START=0x00000000
CONFIG_XILINX_LMB_SIZE=0x00002000
CONFIG_XILINX_CPU_CLOCK_FREQ=62500000
CONFIG_XILINX_MICROBLAZE0_INSTANCE="microblaze_0"
CONFIG_XILINX_MICROBLAZE0_SCO=0
CONFIG_XILINX_MICROBLAZE0_DATA_SIZE=32
CONFIG_XILINX_MICROBLAZE0_DYNAMIC_BUS_SIZING=1
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan3adsp"
CONFIG_XILINX_MICROBLAZE0_AREA_OPTIMIZED=0
CONFIG_XILINX_MICROBLAZE0_INTERCONNECT=1
CONFIG_XILINX_MICROBLAZE0_DPLB_DWIDTH=64
CONFIG_XILINX_MICROBLAZE0_DPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_MICROBLAZE0_DPLB_BURST_EN=0
CONFIG_XILINX_MICROBLAZE0_DPLB_P2P=0
CONFIG_XILINX_MICROBLAZE0_IPLB_DWIDTH=64
CONFIG_XILINX_MICROBLAZE0_IPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_MICROBLAZE0_IPLB_BURST_EN=0
CONFIG_XILINX_MICROBLAZE0_IPLB_P2P=0
CONFIG_XILINX_MICROBLAZE0_D_PLB=1
CONFIG_XILINX_MICROBLAZE0_D_OPB=0
CONFIG_XILINX_MICROBLAZE0_D_LMB=1
CONFIG_XILINX_MICROBLAZE0_I_PLB=1
CONFIG_XILINX_MICROBLAZE0_I_OPB=0
CONFIG_XILINX_MICROBLAZE0_I_LMB=1
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_XILINX_MICROBLAZE0_USE_FPU=1
CONFIG_XILINX_MICROBLAZE0_UNALIGNED_EXCEPTIONS=1
CONFIG_XILINX_MICROBLAZE0_ILL_OPCODE_EXCEPTION=1
CONFIG_XILINX_MICROBLAZE0_IOPB_BUS_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_DOPB_BUS_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_IPLB_BUS_EXCEPTION=1
CONFIG_XILINX_MICROBLAZE0_DPLB_BUS_EXCEPTION=1
CONFIG_XILINX_MICROBLAZE0_DIV_ZERO_EXCEPTION=1
CONFIG_XILINX_MICROBLAZE0_FPU_EXCEPTION=1
CONFIG_XILINX_MICROBLAZE0_FSL_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_PVR=0
CONFIG_XILINX_MICROBLAZE0_PVR_USER1=0x00000000
CONFIG_XILINX_MICROBLAZE0_PVR_USER2=0x00000000
CONFIG_XILINX_MICROBLAZE0_DEBUG_ENABLED=1
CONFIG_XILINX_MICROBLAZE0_NUMBER_OF_PC_BRK=2
CONFIG_XILINX_MICROBLAZE0_NUMBER_OF_RD_ADDR_BRK=0
CONFIG_XILINX_MICROBLAZE0_NUMBER_OF_WR_ADDR_BRK=0
CONFIG_XILINX_MICROBLAZE0_INTERRUPT_IS_EDGE=0
CONFIG_XILINX_MICROBLAZE0_EDGE_IS_POSITIVE=1
CONFIG_XILINX_MICROBLAZE0_RESET_MSR=0x00000000
CONFIG_XILINX_MICROBLAZE0_OPCODE_0X0_ILLEGAL=1
CONFIG_XILINX_MICROBLAZE0_FSL_LINKS=0
CONFIG_XILINX_MICROBLAZE0_FSL_DATA_SIZE=32
CONFIG_XILINX_MICROBLAZE0_USE_EXTENDED_FSL_INSTR=0
CONFIG_XILINX_MICROBLAZE0_ICACHE_BASEADDR=0x20000000
CONFIG_XILINX_MICROBLAZE0_ICACHE_HIGHADDR=0x2FFFFFFF
CONFIG_XILINX_MICROBLAZE0_USE_ICACHE=1
CONFIG_XILINX_MICROBLAZE0_ALLOW_ICACHE_WR=0
CONFIG_XILINX_MICROBLAZE0_ADDR_TAG_BITS=14
CONFIG_XILINX_MICROBLAZE0_CACHE_BYTE_SIZE=16384
CONFIG_XILINX_MICROBLAZE0_ICACHE_USE_FSL=1
CONFIG_XILINX_MICROBLAZE0_ICACHE_LINE_LEN=4
CONFIG_XILINX_MICROBLAZE0_ICACHE_ALWAYS_USED=1
CONFIG_XILINX_MICROBLAZE0_DCACHE_BASEADDR=0x20000000
CONFIG_XILINX_MICROBLAZE0_DCACHE_HIGHADDR=0x2FFFFFFF
CONFIG_XILINX_MICROBLAZE0_USE_DCACHE=1
CONFIG_XILINX_MICROBLAZE0_ALLOW_DCACHE_WR=1
CONFIG_XILINX_MICROBLAZE0_DCACHE_ADDR_TAG=14
CONFIG_XILINX_MICROBLAZE0_DCACHE_BYTE_SIZE=16384
CONFIG_XILINX_MICROBLAZE0_DCACHE_USE_FSL=1
CONFIG_XILINX_MICROBLAZE0_DCACHE_LINE_LEN=4
CONFIG_XILINX_MICROBLAZE0_DCACHE_ALWAYS_USED=1
CONFIG_XILINX_MICROBLAZE0_USE_MMU=3
CONFIG_XILINX_MICROBLAZE0_MMU_DTLB_SIZE=4
CONFIG_XILINX_MICROBLAZE0_MMU_ITLB_SIZE=2
CONFIG_XILINX_MICROBLAZE0_MMU_TLB_ACCESS=3
CONFIG_XILINX_MICROBLAZE0_MMU_ZONES=2
CONFIG_XILINX_MICROBLAZE0_USE_INTERRUPT=1
CONFIG_XILINX_MICROBLAZE0_USE_EXT_BRK=1
CONFIG_XILINX_MICROBLAZE0_USE_EXT_NM_BRK=1
CONFIG_XILINX_MICROBLAZE0_HW_VER="7.10.d"
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_0_INSTANCE="dlmb_cntlr"
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_0_BASEADDR=0x00000000
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_0_HIGHADDR=0x00001FFF
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_0_MASK=0xA0000000
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_0_LMB_AWIDTH=32
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_0_LMB_DWIDTH=32
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_0_HW_VER="2.10.a"
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_1_INSTANCE="ilmb_cntlr"
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_1_BASEADDR=0x00000000
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_1_HIGHADDR=0x00001FFF
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_1_MASK=0xA0000000
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_1_LMB_AWIDTH=32
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_1_LMB_DWIDTH=32
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_1_HW_VER="2.10.a"
CONFIG_XILINX_TIMER_0_INSTANCE="timer_1"
CONFIG_XILINX_TIMER_0_FAMILY="spartan3adsp"
CONFIG_XILINX_TIMER_0_COUNT_WIDTH=32
CONFIG_XILINX_TIMER_0_ONE_TIMER_ONLY=0
CONFIG_XILINX_TIMER_0_TRIG0_ASSERT=1
CONFIG_XILINX_TIMER_0_TRIG1_ASSERT=1
CONFIG_XILINX_TIMER_0_GEN0_ASSERT=1
CONFIG_XILINX_TIMER_0_GEN1_ASSERT=1
CONFIG_XILINX_TIMER_0_BASEADDR=0x84010000
CONFIG_XILINX_TIMER_0_HIGHADDR=0x8401FFFF
CONFIG_XILINX_TIMER_0_SPLB_AWIDTH=32
CONFIG_XILINX_TIMER_0_SPLB_DWIDTH=64
CONFIG_XILINX_TIMER_0_SPLB_P2P=0
CONFIG_XILINX_TIMER_0_SPLB_MID_WIDTH=1
CONFIG_XILINX_TIMER_0_SPLB_NUM_MASTERS=2
CONFIG_XILINX_TIMER_0_SPLB_SUPPORT_BURSTS=0
CONFIG_XILINX_TIMER_0_SPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_TIMER_0_HW_VER="1.00.a"
CONFIG_XILINX_TIMER_0_IRQ=0
CONFIG_XILINX_UARTLITE_0_INSTANCE="RS232_Uart"
CONFIG_XILINX_UARTLITE_0_FAMILY="spartan3adsp"
CONFIG_XILINX_UARTLITE_0_SPLB_CLK_FREQ_HZ=62500000
CONFIG_XILINX_UARTLITE_0_BASEADDR=0x84000000
CONFIG_XILINX_UARTLITE_0_HIGHADDR=0x8400FFFF
CONFIG_XILINX_UARTLITE_0_SPLB_AWIDTH=32
CONFIG_XILINX_UARTLITE_0_SPLB_DWIDTH=64
CONFIG_XILINX_UARTLITE_0_SPLB_P2P=0
CONFIG_XILINX_UARTLITE_0_SPLB_MID_WIDTH=1
CONFIG_XILINX_UARTLITE_0_SPLB_NUM_MASTERS=2
CONFIG_XILINX_UARTLITE_0_SPLB_SUPPORT_BURSTS=0
CONFIG_XILINX_UARTLITE_0_SPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_UARTLITE_0_BAUDRATE=115200
CONFIG_XILINX_UARTLITE_0_DATA_BITS=8
CONFIG_XILINX_UARTLITE_0_USE_PARITY=0
CONFIG_XILINX_UARTLITE_0_ODD_PARITY=0
CONFIG_XILINX_UARTLITE_0_HW_VER="1.00.a"
CONFIG_XILINX_UARTLITE_0_IRQ=4
CONFIG_XILINX_MDM_0_INSTANCE="debug_module"
CONFIG_XILINX_MDM_0_FAMILY="spartan3adsp"
CONFIG_XILINX_MDM_0_JTAG_CHAIN=2
CONFIG_XILINX_MDM_0_INTERCONNECT=1
CONFIG_XILINX_MDM_0_BASEADDR=0x84400000
CONFIG_XILINX_MDM_0_HIGHADDR=0x8440FFFF
CONFIG_XILINX_MDM_0_SPLB_AWIDTH=32
CONFIG_XILINX_MDM_0_SPLB_DWIDTH=64
CONFIG_XILINX_MDM_0_SPLB_P2P=0
CONFIG_XILINX_MDM_0_SPLB_MID_WIDTH=1
CONFIG_XILINX_MDM_0_SPLB_NUM_MASTERS=2
CONFIG_XILINX_MDM_0_SPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_MDM_0_SPLB_SUPPORT_BURSTS=0
CONFIG_XILINX_MDM_0_OPB_DWIDTH=32
CONFIG_XILINX_MDM_0_OPB_AWIDTH=32
CONFIG_XILINX_MDM_0_MB_DBG_PORTS=1
CONFIG_XILINX_MDM_0_USE_UART=1
CONFIG_XILINX_MDM_0_UART_WIDTH=8
CONFIG_XILINX_MDM_0_WRITE_FSL_PORTS=0
CONFIG_XILINX_MDM_0_HW_VER="1.00.d"
CONFIG_XILINX_GPIO_0_INSTANCE="LEDs_8Bit"
CONFIG_XILINX_GPIO_0_BASEADDR=0x81400000
CONFIG_XILINX_GPIO_0_HIGHADDR=0x8140FFFF
CONFIG_XILINX_GPIO_0_SPLB_AWIDTH=32
CONFIG_XILINX_GPIO_0_SPLB_DWIDTH=64
CONFIG_XILINX_GPIO_0_SPLB_P2P=0
CONFIG_XILINX_GPIO_0_SPLB_MID_WIDTH=1
CONFIG_XILINX_GPIO_0_SPLB_NUM_MASTERS=2
CONFIG_XILINX_GPIO_0_SPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_GPIO_0_SPLB_SUPPORT_BURSTS=0
CONFIG_XILINX_GPIO_0_FAMILY="spartan3adsp"
CONFIG_XILINX_GPIO_0_GPIO_WIDTH=8
CONFIG_XILINX_GPIO_0_ALL_INPUTS=0
CONFIG_XILINX_GPIO_0_INTERRUPT_PRESENT=0
CONFIG_XILINX_GPIO_0_IS_BIDIR=1
CONFIG_XILINX_GPIO_0_DOUT_DEFAULT=0x00000000
CONFIG_XILINX_GPIO_0_TRI_DEFAULT=0xFFFFFFFF
CONFIG_XILINX_GPIO_0_IS_DUAL=0
CONFIG_XILINX_GPIO_0_ALL_INPUTS_2=0
CONFIG_XILINX_GPIO_0_IS_BIDIR_2=1
CONFIG_XILINX_GPIO_0_DOUT_DEFAULT_2=0x00000000
CONFIG_XILINX_GPIO_0_TRI_DEFAULT_2=0xFFFFFFFF
CONFIG_XILINX_GPIO_0_HW_VER="1.00.a"
CONFIG_XILINX_GPIO_1_INSTANCE="DIP_Switches_8Bit"
CONFIG_XILINX_GPIO_1_BASEADDR=0x81420000
CONFIG_XILINX_GPIO_1_HIGHADDR=0x8142FFFF
CONFIG_XILINX_GPIO_1_SPLB_AWIDTH=32
CONFIG_XILINX_GPIO_1_SPLB_DWIDTH=64
CONFIG_XILINX_GPIO_1_SPLB_P2P=0
CONFIG_XILINX_GPIO_1_SPLB_MID_WIDTH=1
CONFIG_XILINX_GPIO_1_SPLB_NUM_MASTERS=2
CONFIG_XILINX_GPIO_1_SPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_GPIO_1_SPLB_SUPPORT_BURSTS=0
CONFIG_XILINX_GPIO_1_FAMILY="spartan3adsp"
CONFIG_XILINX_GPIO_1_GPIO_WIDTH=8
CONFIG_XILINX_GPIO_1_ALL_INPUTS=1
CONFIG_XILINX_GPIO_1_INTERRUPT_PRESENT=0
CONFIG_XILINX_GPIO_1_IS_BIDIR=0
CONFIG_XILINX_GPIO_1_DOUT_DEFAULT=0x00000000
CONFIG_XILINX_GPIO_1_TRI_DEFAULT=0xFFFFFFFF
CONFIG_XILINX_GPIO_1_IS_DUAL=0
CONFIG_XILINX_GPIO_1_ALL_INPUTS_2=0
CONFIG_XILINX_GPIO_1_IS_BIDIR_2=1
CONFIG_XILINX_GPIO_1_DOUT_DEFAULT_2=0x00000000
CONFIG_XILINX_GPIO_1_TRI_DEFAULT_2=0xFFFFFFFF
CONFIG_XILINX_GPIO_1_HW_VER="1.00.a"
CONFIG_XILINX_MPMC_0_INSTANCE="DDR2_SDRAM"
CONFIG_XILINX_MPMC_0_FAMILY="spartan3adsp"
CONFIG_XILINX_MPMC_0_NUM_PORTS=4
CONFIG_XILINX_MPMC_0_ALL_PIMS_SHARE_ADDRESSES=1
CONFIG_XILINX_MPMC_0_MPMC_BASEADDR=0x20000000
CONFIG_XILINX_MPMC_0_MPMC_HIGHADDR=0x2FFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL_BASEADDR=0x84600000
CONFIG_XILINX_MPMC_0_SDMA_CTRL_HIGHADDR=0x8460FFFF
CONFIG_XILINX_MPMC_0_MPMC_CTRL_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_MPMC_CTRL_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_MPMC_CTRL_AWIDTH=32
CONFIG_XILINX_MPMC_0_MPMC_CTRL_DWIDTH=64
CONFIG_XILINX_MPMC_0_MPMC_CTRL_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_MPMC_CTRL_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_MPMC_CTRL_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_MPMC_CTRL_P2P=1
CONFIG_XILINX_MPMC_0_MPMC_CTRL_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_MPMC_CTRL_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_NUM_IDELAYCTRL=1
CONFIG_XILINX_MPMC_0_IDELAYCTRL_LOC="NOT_SET"
CONFIG_XILINX_MPMC_0_MAX_REQ_ALLOWED=1
CONFIG_XILINX_MPMC_0_ARB_PIPELINE=1
CONFIG_XILINX_MPMC_0_WR_DATAPATH_TML_PIPELINE=1
CONFIG_XILINX_MPMC_0_RD_DATAPATH_TML_MAX_FANOUT=0
CONFIG_XILINX_MPMC_0_ARB_USE_DEFAULT=0
CONFIG_XILINX_MPMC_0_ARB0_ALGO="ROUND_ROBIN"
CONFIG_XILINX_MPMC_0_ARB0_NUM_SLOTS=8
CONFIG_XILINX_MPMC_0_ARB0_SLOT0="01234567"
CONFIG_XILINX_MPMC_0_ARB0_SLOT1="12345670"
CONFIG_XILINX_MPMC_0_ARB0_SLOT2="23456701"
CONFIG_XILINX_MPMC_0_ARB0_SLOT3="34567012"
CONFIG_XILINX_MPMC_0_ARB0_SLOT4="45670123"
CONFIG_XILINX_MPMC_0_ARB0_SLOT5="56701234"
CONFIG_XILINX_MPMC_0_ARB0_SLOT6="67012345"
CONFIG_XILINX_MPMC_0_ARB0_SLOT7="70123456"
CONFIG_XILINX_MPMC_0_ARB0_SLOT8="01234567"
CONFIG_XILINX_MPMC_0_ARB0_SLOT9="12345670"
CONFIG_XILINX_MPMC_0_ARB0_SLOT10="23456701"
CONFIG_XILINX_MPMC_0_ARB0_SLOT11="34567012"
CONFIG_XILINX_MPMC_0_ARB0_SLOT12="45670123"
CONFIG_XILINX_MPMC_0_ARB0_SLOT13="56701234"
CONFIG_XILINX_MPMC_0_ARB0_SLOT14="67012345"
CONFIG_XILINX_MPMC_0_ARB0_SLOT15="70123456"
CONFIG_XILINX_MPMC_0_PM_ENABLE=0
CONFIG_XILINX_MPMC_0_PM_DC_WIDTH=48
CONFIG_XILINX_MPMC_0_PM_GC_CNTR=1
CONFIG_XILINX_MPMC_0_PM_GC_WIDTH=48
CONFIG_XILINX_MPMC_0_PM_SHIFT_CNT_BY=1
CONFIG_XILINX_MPMC_0_SKIP_SIM_INIT_DELAY=0
CONFIG_XILINX_MPMC_0_USE_STATIC_PHY=0
CONFIG_XILINX_MPMC_0_STATIC_PHY_RDDATA_CLK_SEL=0
CONFIG_XILINX_MPMC_0_STATIC_PHY_RDDATA_SWAP_RISE=0
CONFIG_XILINX_MPMC_0_STATIC_PHY_RDEN_DELAY=5
CONFIG_XILINX_MPMC_0_DEBUG_REG_ENABLE=0
CONFIG_XILINX_MPMC_0_SPECIAL_BOARD="NONE"
CONFIG_XILINX_MPMC_0_MEM_TYPE="DDR2"
CONFIG_XILINX_MPMC_0_MEM_PARTNO="MT4HTF6464H-667"
CONFIG_XILINX_MPMC_0_MEM_PART_DATA_DEPTH=64
CONFIG_XILINX_MPMC_0_MEM_PART_DATA_WIDTH=16
CONFIG_XILINX_MPMC_0_MEM_PART_NUM_BANK_BITS=3
CONFIG_XILINX_MPMC_0_MEM_PART_NUM_ROW_BITS=13
CONFIG_XILINX_MPMC_0_MEM_PART_NUM_COL_BITS=10
CONFIG_XILINX_MPMC_0_MEM_PART_TRAS=40000
CONFIG_XILINX_MPMC_0_MEM_PART_TRASMAX=70000000
CONFIG_XILINX_MPMC_0_MEM_PART_TRC=55000
CONFIG_XILINX_MPMC_0_MEM_PART_TRCD=15000
CONFIG_XILINX_MPMC_0_MEM_PART_TDQSS=1
CONFIG_XILINX_MPMC_0_MEM_PART_TWR=15000
CONFIG_XILINX_MPMC_0_MEM_PART_TRP=15000
CONFIG_XILINX_MPMC_0_MEM_PART_TMRD=2
CONFIG_XILINX_MPMC_0_MEM_PART_TRRD=10000
CONFIG_XILINX_MPMC_0_MEM_PART_TRFC=105000
CONFIG_XILINX_MPMC_0_MEM_PART_TREFI=7800000
CONFIG_XILINX_MPMC_0_MEM_PART_TAL=0
CONFIG_XILINX_MPMC_0_MEM_PART_TCCD=2
CONFIG_XILINX_MPMC_0_MEM_PART_TWTR=7500
CONFIG_XILINX_MPMC_0_MEM_PART_TRTP=7500
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_A_FMAX=200
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_A=3
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_B_FMAX=266
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_B=4
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_C_FMAX=333
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_C=5
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_D_FMAX=0
CONFIG_XILINX_MPMC_0_MEM_PART_CAS_D=0
CONFIG_XILINX_MPMC_0_MEM_CAS_LATENCY0=3
CONFIG_XILINX_MPMC_0_MEM_ODT_TYPE=1
CONFIG_XILINX_MPMC_0_MEM_REDUCED_DRV=0
CONFIG_XILINX_MPMC_0_MEM_REG_DIMM=0
CONFIG_XILINX_MPMC_0_MPMC_CLK0_PERIOD_PS=8000
CONFIG_XILINX_MPMC_0_MEM_CLK_WIDTH=2
CONFIG_XILINX_MPMC_0_MEM_ODT_WIDTH=1
CONFIG_XILINX_MPMC_0_MEM_CE_WIDTH=1
CONFIG_XILINX_MPMC_0_MEM_CS_N_WIDTH=1
CONFIG_XILINX_MPMC_0_MEM_ADDR_WIDTH=13
CONFIG_XILINX_MPMC_0_MEM_BANKADDR_WIDTH=3
CONFIG_XILINX_MPMC_0_MEM_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_MEM_BITS_DATA_PER_DQS=8
CONFIG_XILINX_MPMC_0_MEM_DM_WIDTH=4
CONFIG_XILINX_MPMC_0_MEM_DQS_WIDTH=4
CONFIG_XILINX_MPMC_0_MEM_NUM_DIMMS=1
CONFIG_XILINX_MPMC_0_MEM_NUM_RANKS=1
CONFIG_XILINX_MPMC_0_MEM_DQS_IO_COL=0x0
CONFIG_XILINX_MPMC_0_MEM_DQ_IO_MS=0x0
CONFIG_XILINX_MPMC_0_DDR2_DQSN_ENABLE=1
CONFIG_XILINX_MPMC_0_INCLUDE_ECC_SUPPORT=0
CONFIG_XILINX_MPMC_0_ECC_DEFAULT_ON=1
CONFIG_XILINX_MPMC_0_INCLUDE_ECC_TEST=0
CONFIG_XILINX_MPMC_0_ECC_SEC_THRESHOLD=1
CONFIG_XILINX_MPMC_0_ECC_DEC_THRESHOLD=1
CONFIG_XILINX_MPMC_0_ECC_PEC_THRESHOLD=1
CONFIG_XILINX_MPMC_0_ECC_DATA_WIDTH=0
CONFIG_XILINX_MPMC_0_ECC_DM_WIDTH=0
CONFIG_XILINX_MPMC_0_ECC_DQS_WIDTH=0
CONFIG_XILINX_MPMC_0_TBY4TAPVALUE=9999
CONFIG_XILINX_MPMC_0_PIM0_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM0_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM0_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM0_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM0_BASETYPE=1
CONFIG_XILINX_MPMC_0_PIM0_SUBTYPE="IXCL"
CONFIG_XILINX_MPMC_0_XCL0_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL0_WRITEXFER=0
CONFIG_XILINX_MPMC_0_XCL0_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB0_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB0_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB0_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB0_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SPLB0_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB0_P2P=1
CONFIG_XILINX_MPMC_0_SPLB0_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB0_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_P2P=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL0_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA0_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA0_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA0_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA0_PI2LL_CLK_RATIO=1
CONFIG_XILINX_MPMC_0_PPC440MC0_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC0_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC0_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC0_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC0_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC0_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC0_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI0_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI0_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI0_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI0_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI0_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI0_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI0_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI0_PM_USED=1
CONFIG_XILINX_MPMC_0_PI0_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_PIM1_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM1_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM1_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM1_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM1_BASETYPE=1
CONFIG_XILINX_MPMC_0_PIM1_SUBTYPE="DXCL"
CONFIG_XILINX_MPMC_0_XCL1_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL1_WRITEXFER=1
CONFIG_XILINX_MPMC_0_XCL1_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB1_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB1_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB1_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB1_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SPLB1_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB1_P2P=1
CONFIG_XILINX_MPMC_0_SPLB1_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB1_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_P2P=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL1_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA1_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA1_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA1_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA1_PI2LL_CLK_RATIO=1
CONFIG_XILINX_MPMC_0_PPC440MC1_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC1_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC1_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC1_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC1_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC1_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC1_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI1_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI1_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI1_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI1_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI1_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI1_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI1_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI1_PM_USED=1
CONFIG_XILINX_MPMC_0_PI1_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_PIM2_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM2_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM2_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM2_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM2_BASETYPE=2
CONFIG_XILINX_MPMC_0_PIM2_SUBTYPE="PLB"
CONFIG_XILINX_MPMC_0_XCL2_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL2_WRITEXFER=1
CONFIG_XILINX_MPMC_0_XCL2_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB2_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB2_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB2_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB2_NUM_MASTERS=2
CONFIG_XILINX_MPMC_0_SPLB2_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB2_P2P=0
CONFIG_XILINX_MPMC_0_SPLB2_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB2_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_P2P=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL2_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA2_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA2_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA2_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA2_PI2LL_CLK_RATIO=1
CONFIG_XILINX_MPMC_0_PPC440MC2_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC2_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC2_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC2_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC2_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC2_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC2_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI2_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI2_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI2_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI2_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI2_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI2_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI2_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI2_PM_USED=1
CONFIG_XILINX_MPMC_0_PI2_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_PIM3_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM3_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM3_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM3_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM3_BASETYPE=3
CONFIG_XILINX_MPMC_0_PIM3_SUBTYPE="SDMA"
CONFIG_XILINX_MPMC_0_XCL3_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL3_WRITEXFER=1
CONFIG_XILINX_MPMC_0_XCL3_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB3_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB3_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB3_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB3_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SPLB3_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB3_P2P=1
CONFIG_XILINX_MPMC_0_SPLB3_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB3_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_NUM_MASTERS=2
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_P2P=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL3_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA3_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA3_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA3_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA3_PI2LL_CLK_RATIO=2
CONFIG_XILINX_MPMC_0_PPC440MC3_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC3_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC3_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC3_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC3_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC3_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC3_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI3_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI3_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI3_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI3_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI3_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI3_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI3_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI3_PM_USED=1
CONFIG_XILINX_MPMC_0_PI3_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_PIM4_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM4_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM4_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM4_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM4_BASETYPE=0
CONFIG_XILINX_MPMC_0_PIM4_SUBTYPE="INACTIVE"
CONFIG_XILINX_MPMC_0_XCL4_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL4_WRITEXFER=1
CONFIG_XILINX_MPMC_0_XCL4_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB4_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB4_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB4_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB4_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SPLB4_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB4_P2P=1
CONFIG_XILINX_MPMC_0_SPLB4_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB4_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_P2P=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL4_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA4_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA4_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA4_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA4_PI2LL_CLK_RATIO=1
CONFIG_XILINX_MPMC_0_PPC440MC4_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC4_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC4_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC4_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC4_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC4_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC4_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI4_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI4_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI4_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI4_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI4_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI4_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI4_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI4_PM_USED=1
CONFIG_XILINX_MPMC_0_PI4_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_PIM5_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM5_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM5_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM5_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM5_BASETYPE=0
CONFIG_XILINX_MPMC_0_PIM5_SUBTYPE="INACTIVE"
CONFIG_XILINX_MPMC_0_XCL5_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL5_WRITEXFER=1
CONFIG_XILINX_MPMC_0_XCL5_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB5_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB5_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB5_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB5_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SPLB5_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB5_P2P=1
CONFIG_XILINX_MPMC_0_SPLB5_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB5_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_P2P=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL5_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA5_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA5_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA5_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA5_PI2LL_CLK_RATIO=1
CONFIG_XILINX_MPMC_0_PPC440MC5_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC5_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC5_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC5_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC5_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC5_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC5_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI5_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI5_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI5_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI5_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI5_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI5_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI5_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI5_PM_USED=1
CONFIG_XILINX_MPMC_0_PI5_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_PIM6_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM6_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM6_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM6_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM6_BASETYPE=0
CONFIG_XILINX_MPMC_0_PIM6_SUBTYPE="INACTIVE"
CONFIG_XILINX_MPMC_0_XCL6_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL6_WRITEXFER=1
CONFIG_XILINX_MPMC_0_XCL6_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB6_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB6_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB6_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB6_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SPLB6_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB6_P2P=1
CONFIG_XILINX_MPMC_0_SPLB6_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB6_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_P2P=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL6_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA6_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA6_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA6_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA6_PI2LL_CLK_RATIO=1
CONFIG_XILINX_MPMC_0_PPC440MC6_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC6_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC6_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC6_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC6_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC6_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC6_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI6_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI6_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI6_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI6_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI6_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI6_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI6_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI6_PM_USED=1
CONFIG_XILINX_MPMC_0_PI6_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_PIM7_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_PIM7_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_PIM7_OFFSET=0x00000000
CONFIG_XILINX_MPMC_0_PIM7_DATA_WIDTH=64
CONFIG_XILINX_MPMC_0_PIM7_BASETYPE=0
CONFIG_XILINX_MPMC_0_PIM7_SUBTYPE="INACTIVE"
CONFIG_XILINX_MPMC_0_XCL7_LINESIZE=4
CONFIG_XILINX_MPMC_0_XCL7_WRITEXFER=1
CONFIG_XILINX_MPMC_0_XCL7_PIPE_STAGES=3
CONFIG_XILINX_MPMC_0_SPLB7_AWIDTH=32
CONFIG_XILINX_MPMC_0_SPLB7_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB7_NATIVE_DWIDTH=64
CONFIG_XILINX_MPMC_0_SPLB7_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SPLB7_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SPLB7_P2P=1
CONFIG_XILINX_MPMC_0_SPLB7_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SPLB7_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_HIGHADDR=0x00000000
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_AWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_DWIDTH=64
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_NATIVE_DWIDTH=32
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_NUM_MASTERS=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_MID_WIDTH=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_P2P=1
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_SUPPORT_BURSTS=0
CONFIG_XILINX_MPMC_0_SDMA_CTRL7_SMALLEST_MASTER=32
CONFIG_XILINX_MPMC_0_SDMA7_COMPLETED_ERR_TX=1
CONFIG_XILINX_MPMC_0_SDMA7_COMPLETED_ERR_RX=1
CONFIG_XILINX_MPMC_0_SDMA7_PRESCALAR=1023
CONFIG_XILINX_MPMC_0_SDMA7_PI2LL_CLK_RATIO=1
CONFIG_XILINX_MPMC_0_PPC440MC7_BURST_LENGTH=4
CONFIG_XILINX_MPMC_0_PPC440MC7_PIPE_STAGES=1
CONFIG_XILINX_MPMC_0_VFBC7_CMD_FIFO_DEPTH=32
CONFIG_XILINX_MPMC_0_VFBC7_CMD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_VFBC7_RDWD_DATA_WIDTH=32
CONFIG_XILINX_MPMC_0_VFBC7_RDWD_FIFO_DEPTH=1024
CONFIG_XILINX_MPMC_0_VFBC7_RD_AEMPTY_WD_AFULL_COUNT=3
CONFIG_XILINX_MPMC_0_PI7_RD_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI7_WR_FIFO_TYPE="BRAM"
CONFIG_XILINX_MPMC_0_PI7_ADDRACK_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI7_RD_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI7_RD_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI7_WR_FIFO_APP_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI7_WR_FIFO_MEM_PIPELINE=1
CONFIG_XILINX_MPMC_0_PI7_PM_USED=1
CONFIG_XILINX_MPMC_0_PI7_PM_DC_CNTR=1
CONFIG_XILINX_MPMC_0_WR_TRAINING_PORT=1
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_00=0x00FFFFFF
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_01=0x00FFFFFF
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_02=0x00FFFFFF
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_03=0x00FFFFFF
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_04=0x00FFFFFF
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_05=0x00FFFFFF
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_06=0x00FFFFFF
CONFIG_XILINX_MPMC_0_ARB_BRAM_INIT_07=0x00FFFFFF
CONFIG_XILINX_MPMC_0_TWR=15000
CONFIG_XILINX_MPMC_0_CTRL_AP_COL_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_AP_PI_ADDR_CE_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_AP_PORT_SELECT_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_AP_PIPELINE1_CE_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_DP_LOAD_RDWDADDR_DELAY=0x00000002
CONFIG_XILINX_MPMC_0_CTRL_DP_RDFIFO_WHICHPORT_DELAY=0x0000000C
CONFIG_XILINX_MPMC_0_CTRL_DP_SIZE_DELAY=0x00000002
CONFIG_XILINX_MPMC_0_CTRL_DP_WRFIFO_WHICHPORT_DELAY=0x00000004
CONFIG_XILINX_MPMC_0_CTRL_PHYIF_DUMMYREADSTART_DELAY=0x00000005
CONFIG_XILINX_MPMC_0_CTRL_Q0_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q1_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q2_DELAY=0x00000002
CONFIG_XILINX_MPMC_0_CTRL_Q3_DELAY=0x00000002
CONFIG_XILINX_MPMC_0_CTRL_Q4_DELAY=0x00000002
CONFIG_XILINX_MPMC_0_CTRL_Q5_DELAY=0x00000002
CONFIG_XILINX_MPMC_0_CTRL_Q6_DELAY=0x00000005
CONFIG_XILINX_MPMC_0_CTRL_Q7_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q8_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q9_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q10_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q11_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q12_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q13_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q14_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q15_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q16_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q17_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q18_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q19_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q20_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q21_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q22_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q23_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q24_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q25_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q26_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q27_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q28_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q29_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q30_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q31_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q32_DELAY=0x00000002
CONFIG_XILINX_MPMC_0_CTRL_Q33_DELAY=0x00000001
CONFIG_XILINX_MPMC_0_CTRL_Q34_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_CTRL_Q35_DELAY=0x00000000
CONFIG_XILINX_MPMC_0_SKIP_1_VALUE=0x001
CONFIG_XILINX_MPMC_0_SKIP_2_VALUE=0x001
CONFIG_XILINX_MPMC_0_SKIP_3_VALUE=0x001
CONFIG_XILINX_MPMC_0_SKIP_4_VALUE=0x001
CONFIG_XILINX_MPMC_0_SKIP_5_VALUE=0x001
CONFIG_XILINX_MPMC_0_SKIP_6_VALUE=0x001
CONFIG_XILINX_MPMC_0_SKIP_7_VALUE=0x001
CONFIG_XILINX_MPMC_0_B16_REPEAT_CNT=0
CONFIG_XILINX_MPMC_0_B32_REPEAT_CNT=2
CONFIG_XILINX_MPMC_0_B64_REPEAT_CNT=6
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL0=0x00000000
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL0=0x0000000B
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL1=0x0000000C
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL1=0x00000013
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL2=0x00000014
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL2=0x0000001F
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL3=0x00000020
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL3=0x00000027
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL4=0x00000028
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL4=0x00000033
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL5=0x00000034
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL5=0x0000003B
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL6=0x0000003C
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL6=0x00000049
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL7=0x0000004A
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL7=0x00000052
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL8=0x00000053
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL8=0x00000064
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL9=0x00000065
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL9=0x00000071
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL10=0x00000072
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL10=0x00000083
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL11=0x00000084
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL11=0x00000090
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL12=0x00000091
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL12=0x000000A2
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL13=0x000000A3
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL13=0x000000AF
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL14=0x000000B0
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL14=0x000000C0
CONFIG_XILINX_MPMC_0_BASEADDR_CTRL15=0x000000C1
CONFIG_XILINX_MPMC_0_HIGHADDR_CTRL15=0x000000C2
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_3F=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_3E=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_3D=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_3C=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_3B=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_3A=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_39=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_38=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_37=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_36=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_35=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_34=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_33=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_32=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_31=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_30=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_2F=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_2E=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_2D=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_2C=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_2B=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_2A=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_29=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_28=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_27=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_26=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_25=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_24=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_23=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_22=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_21=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_20=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_1F=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_1E=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_1D=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_1C=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_1B=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_1A=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_19=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_18=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_17=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_16=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_15=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_14=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_13=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_12=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_11=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_10=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_0F=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_0E=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_0D=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_0C=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_0B=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_0A=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_09=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_08=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_07=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_06=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_05=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_04=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_03=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_02=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_01=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INIT_00=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_SRVAL=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_07=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_06=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_05=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_04=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_03=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_02=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_01=0x0
CONFIG_XILINX_MPMC_0_CTRL_BRAM_INITP_00=0x0
CONFIG_XILINX_MPMC_0_HW_VER="4.03.a"
CONFIG_XILINX_MPMC_0_SDMA3_RX_INTOUT_IRQ=2
CONFIG_XILINX_MPMC_0_SDMA3_TX_INTOUT_IRQ=1
CONFIG_XILINX_LL_TEMAC_0_INSTANCE="Soft_TEMAC"
CONFIG_XILINX_LL_TEMAC_0_NUM_IDELAYCTRL=0
CONFIG_XILINX_LL_TEMAC_0_IDELAYCTRL_LOC="NOT_SET"
CONFIG_XILINX_LL_TEMAC_0_RESERVED=0
CONFIG_XILINX_LL_TEMAC_0_SPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_LL_TEMAC_0_FAMILY="spartan3adsp"
CONFIG_XILINX_LL_TEMAC_0_BASEADDR=0x81C00000
CONFIG_XILINX_LL_TEMAC_0_HIGHADDR=0x81C0FFFF
CONFIG_XILINX_LL_TEMAC_0_SPLB_DWIDTH=64
CONFIG_XILINX_LL_TEMAC_0_SPLB_AWIDTH=32
CONFIG_XILINX_LL_TEMAC_0_SPLB_NUM_MASTERS=2
CONFIG_XILINX_LL_TEMAC_0_SPLB_MID_WIDTH=1
CONFIG_XILINX_LL_TEMAC_0_SPLB_P2P=0
CONFIG_XILINX_LL_TEMAC_0_INCLUDE_IO=1
CONFIG_XILINX_LL_TEMAC_0_PHY_TYPE=1
CONFIG_XILINX_LL_TEMAC_0_TEMAC1_ENABLED=0
CONFIG_XILINX_LL_TEMAC_0_TEMAC0_TXFIFO=16384
CONFIG_XILINX_LL_TEMAC_0_TEMAC0_RXFIFO=16384
CONFIG_XILINX_LL_TEMAC_0_TEMAC1_TXFIFO=4096
CONFIG_XILINX_LL_TEMAC_0_TEMAC1_RXFIFO=4096
CONFIG_XILINX_LL_TEMAC_0_BUS2CORE_CLK_RATIO=1
CONFIG_XILINX_LL_TEMAC_0_TEMAC_TYPE=2
CONFIG_XILINX_LL_TEMAC_0_TEMAC0_TXCSUM=1
CONFIG_XILINX_LL_TEMAC_0_TEMAC0_RXCSUM=1
CONFIG_XILINX_LL_TEMAC_0_TEMAC1_TXCSUM=0
CONFIG_XILINX_LL_TEMAC_0_TEMAC1_RXCSUM=0
CONFIG_XILINX_LL_TEMAC_0_TEMAC0_PHYADDR=0x00000001
CONFIG_XILINX_LL_TEMAC_0_TEMAC1_PHYADDR=0x00000002
CONFIG_XILINX_LL_TEMAC_0_SPLB_CLK_PERIOD_PS=16000
CONFIG_XILINX_LL_TEMAC_0_HW_VER="1.01.b"
CONFIG_XILINX_LL_TEMAC_0_IRQ=3
CONFIG_XILINX_LLTEMAC_0_BASEADDR=0x81C00000
CONFIG_XILINX_LLTEMAC_0_HIGHADDR=0x81C0003F
CONFIG_XILINX_LLTEMAC_0_TXCSUM=1
CONFIG_XILINX_LLTEMAC_0_RXCSUM=1
CONFIG_XILINX_LLTEMAC_0_PHY_TYPE=1
CONFIG_XILINX_LLTEMAC_0_IRQ=3
CONFIG_XILINX_LLTEMAC_0_LLINK_TYPE=2
CONFIG_XILINX_LLTEMAC_0_LLINK_SDMA_BASEADDR=0x84600180
CONFIG_XILINX_LLTEMAC_0_LLINK_DMARX_INTR=2
CONFIG_XILINX_LLTEMAC_0_LLINK_DMATX_INTR=1
CONFIG_XILINX_INTC_0_INSTANCE="xps_intc_0"
CONFIG_XILINX_INTC_0_FAMILY="spartan3adsp"
CONFIG_XILINX_INTC_0_BASEADDR=0x81800000
CONFIG_XILINX_INTC_0_HIGHADDR=0x8180FFFF
CONFIG_XILINX_INTC_0_SPLB_AWIDTH=32
CONFIG_XILINX_INTC_0_SPLB_DWIDTH=64
CONFIG_XILINX_INTC_0_SPLB_P2P=0
CONFIG_XILINX_INTC_0_SPLB_NUM_MASTERS=2
CONFIG_XILINX_INTC_0_SPLB_MID_WIDTH=1
CONFIG_XILINX_INTC_0_SPLB_NATIVE_DWIDTH=32
CONFIG_XILINX_INTC_0_SPLB_SUPPORT_BURSTS=0
CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS=5
CONFIG_XILINX_INTC_0_KIND_OF_INTR=0x00000010
CONFIG_XILINX_INTC_0_KIND_OF_EDGE=0x00000010
CONFIG_XILINX_INTC_0_KIND_OF_LVL=0x0000000F
CONFIG_XILINX_INTC_0_HAS_IPR=1
CONFIG_XILINX_INTC_0_HAS_SIE=1
CONFIG_XILINX_INTC_0_HAS_CIE=1
CONFIG_XILINX_INTC_0_HAS_IVR=1
CONFIG_XILINX_INTC_0_IRQ_ACTIVE=1
CONFIG_XILINX_INTC_0_HW_VER="1.00.a"
CONFIG_XILINX_MCH_EMC_0_INSTANCE="FLASH"
CONFIG_XILINX_MCH_EMC_0_FAMILY="spartan3adsp"
CONFIG_XILINX_MCH_EMC_0_NUM_BANKS_MEM=1
CONFIG_XILINX_MCH_EMC_0_NUM_CHANNELS=0
CONFIG_XILINX_MCH_EMC_0_PRIORITY_MODE=0
CONFIG_XILINX_MCH_EMC_0_INCLUDE_PLB_IPIF=1
CONFIG_XILINX_MCH_EMC_0_INCLUDE_WRBUF=1
CONFIG_XILINX_MCH_EMC_0_SPLB_MID_WIDTH=1
CONFIG_XILINX_MCH_EMC_0_SPLB_NUM_MASTERS=2
CONFIG_XILINX_MCH_EMC_0_SPLB_P2P=0
CONFIG_XILINX_MCH_EMC_0_SPLB_DWIDTH=64
CONFIG_XILINX_MCH_EMC_0_MCH_SPLB_AWIDTH=32
CONFIG_XILINX_MCH_EMC_0_SPLB_SMALLEST_MASTER=32
CONFIG_XILINX_MCH_EMC_0_MCH_NATIVE_DWIDTH=32
CONFIG_XILINX_MCH_EMC_0_MCH_PLB_CLK_PERIOD_PS=16000
CONFIG_XILINX_MCH_EMC_0_MEM0_BASEADDR=0x8C000000
CONFIG_XILINX_MCH_EMC_0_MEM0_HIGHADDR=0x8DFFFFFF
CONFIG_XILINX_MCH_EMC_0_MEM1_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MCH_EMC_0_MEM1_HIGHADDR=0x00000000
CONFIG_XILINX_MCH_EMC_0_MEM2_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MCH_EMC_0_MEM2_HIGHADDR=0x00000000
CONFIG_XILINX_MCH_EMC_0_MEM3_BASEADDR=0xFFFFFFFF
CONFIG_XILINX_MCH_EMC_0_MEM3_HIGHADDR=0x00000000
CONFIG_XILINX_MCH_EMC_0_INCLUDE_NEGEDGE_IOREGS=0
CONFIG_XILINX_MCH_EMC_0_MEM0_WIDTH=16
CONFIG_XILINX_MCH_EMC_0_MEM1_WIDTH=32
CONFIG_XILINX_MCH_EMC_0_MEM2_WIDTH=32
CONFIG_XILINX_MCH_EMC_0_MEM3_WIDTH=32
CONFIG_XILINX_MCH_EMC_0_MAX_MEM_WIDTH=16
CONFIG_XILINX_MCH_EMC_0_INCLUDE_DATAWIDTH_MATCHING_0=1
CONFIG_XILINX_MCH_EMC_0_INCLUDE_DATAWIDTH_MATCHING_1=0
CONFIG_XILINX_MCH_EMC_0_INCLUDE_DATAWIDTH_MATCHING_2=0
CONFIG_XILINX_MCH_EMC_0_INCLUDE_DATAWIDTH_MATCHING_3=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_MEM_0=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_PIPEDELAY_0=2
CONFIG_XILINX_MCH_EMC_0_TCEDV_PS_MEM_0=110000
CONFIG_XILINX_MCH_EMC_0_TAVDV_PS_MEM_0=110000
CONFIG_XILINX_MCH_EMC_0_THZCE_PS_MEM_0=35000
CONFIG_XILINX_MCH_EMC_0_THZOE_PS_MEM_0=7000
CONFIG_XILINX_MCH_EMC_0_TWC_PS_MEM_0=110000
CONFIG_XILINX_MCH_EMC_0_TWP_PS_MEM_0=70000
CONFIG_XILINX_MCH_EMC_0_TLZWE_PS_MEM_0=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_MEM_1=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_PIPEDELAY_1=2
CONFIG_XILINX_MCH_EMC_0_TCEDV_PS_MEM_1=15000
CONFIG_XILINX_MCH_EMC_0_TAVDV_PS_MEM_1=15000
CONFIG_XILINX_MCH_EMC_0_THZCE_PS_MEM_1=7000
CONFIG_XILINX_MCH_EMC_0_THZOE_PS_MEM_1=7000
CONFIG_XILINX_MCH_EMC_0_TWC_PS_MEM_1=15000
CONFIG_XILINX_MCH_EMC_0_TWP_PS_MEM_1=12000
CONFIG_XILINX_MCH_EMC_0_TLZWE_PS_MEM_1=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_MEM_2=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_PIPEDELAY_2=2
CONFIG_XILINX_MCH_EMC_0_TCEDV_PS_MEM_2=15000
CONFIG_XILINX_MCH_EMC_0_TAVDV_PS_MEM_2=15000
CONFIG_XILINX_MCH_EMC_0_THZCE_PS_MEM_2=7000
CONFIG_XILINX_MCH_EMC_0_THZOE_PS_MEM_2=7000
CONFIG_XILINX_MCH_EMC_0_TWC_PS_MEM_2=15000
CONFIG_XILINX_MCH_EMC_0_TWP_PS_MEM_2=12000
CONFIG_XILINX_MCH_EMC_0_TLZWE_PS_MEM_2=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_MEM_3=0
CONFIG_XILINX_MCH_EMC_0_SYNCH_PIPEDELAY_3=2
CONFIG_XILINX_MCH_EMC_0_TCEDV_PS_MEM_3=15000
CONFIG_XILINX_MCH_EMC_0_TAVDV_PS_MEM_3=15000
CONFIG_XILINX_MCH_EMC_0_THZCE_PS_MEM_3=7000
CONFIG_XILINX_MCH_EMC_0_THZOE_PS_MEM_3=7000
CONFIG_XILINX_MCH_EMC_0_TWC_PS_MEM_3=15000
CONFIG_XILINX_MCH_EMC_0_TWP_PS_MEM_3=12000
CONFIG_XILINX_MCH_EMC_0_TLZWE_PS_MEM_3=0
CONFIG_XILINX_MCH_EMC_0_MCH0_PROTOCOL=0
CONFIG_XILINX_MCH_EMC_0_MCH0_ACCESSBUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_MCH0_RDDATABUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_MCH1_PROTOCOL=0
CONFIG_XILINX_MCH_EMC_0_MCH1_ACCESSBUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_MCH1_RDDATABUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_MCH2_PROTOCOL=0
CONFIG_XILINX_MCH_EMC_0_MCH2_ACCESSBUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_MCH2_RDDATABUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_MCH3_PROTOCOL=0
CONFIG_XILINX_MCH_EMC_0_MCH3_ACCESSBUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_MCH3_RDDATABUF_DEPTH=16
CONFIG_XILINX_MCH_EMC_0_XCL0_LINESIZE=4
CONFIG_XILINX_MCH_EMC_0_XCL0_WRITEXFER=1
CONFIG_XILINX_MCH_EMC_0_XCL1_LINESIZE=4
CONFIG_XILINX_MCH_EMC_0_XCL1_WRITEXFER=1
CONFIG_XILINX_MCH_EMC_0_XCL2_LINESIZE=4
CONFIG_XILINX_MCH_EMC_0_XCL2_WRITEXFER=1
CONFIG_XILINX_MCH_EMC_0_XCL3_LINESIZE=4
CONFIG_XILINX_MCH_EMC_0_XCL3_WRITEXFER=1
CONFIG_XILINX_MCH_EMC_0_HW_VER="1.00.a"
CONFIG_XILINX_MCH_EMC_NUM_INSTANCES=1
CONFIG_XILINX_LMB_BRAM_IF_CNTLR_NUM_INSTANCES=2
CONFIG_XILINX_LL_TEMAC_NUM_INSTANCES=1
CONFIG_XILINX_MPMC_NUM_INSTANCES=1
CONFIG_XILINX_TIMER_NUM_INSTANCES=1
CONFIG_XILINX_INTC_NUM_INSTANCES=1
CONFIG_XILINX_MDM_NUM_INSTANCES=1
CONFIG_XILINX_UARTLITE_NUM_INSTANCES=1
CONFIG_XILINX_GPIO_NUM_INSTANCES=2
#
# Processor type and features
#
CONFIG_MMU=y
# CONFIG_OPT_LIB_FUNCTION is not set
#
# Boot options
#
CONFIG_CMDLINE=""
# CONFIG_CMDLINE_FORCE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
#
# Exectuable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_IPSEC_NAT_TRAVERSAL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_XILINX_SYSACE is not set
#
# Misc devices
#
# CONFIG_TIFM_CORE is not set
# CONFIG_MICROBLAZE_FSLFIFO is not set
CONFIG_NEED_XILINX_LLDMA=y
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_NETLINK is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
# CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# PHY device support
#
#
# Ethernet (10 or 100Mbit)
#
# CONFIG_NET_ETHERNET is not set
# CONFIG_OPEN_ETH is not set
# CONFIG_MTIP1000_ETH is not set
# CONFIG_NE2000 is not set
# CONFIG_XILINX_EMAC is not set
# CONFIG_XILINX_EMACLITE is not set
#
# Ethernet (1000 Mbit)
#
CONFIG_XILINX_LLTEMAC=y
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# PCMCIA network device support
#
# CONFIG_NET_PCMCIA is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
# CONFIG_INPUT is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_LEDMAN is not set
# CONFIG_SNAPDOG is not set
# CONFIG_FAST_TIMER is not set
# CONFIG_RESETSWITCH is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
CONFIG_HW_RANDOM=m
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_XILINX_SPI is not set
# CONFIG_XILINX_GPIO is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_M41T11M6 is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Virtualization
#
CONFIG_XILINX_EDK=y
#
# Userspace I/O
#
# CONFIG_UIO is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_INOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
CONFIG_DIRECTIO=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=y
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# Debug
#
# CONFIG_COREDUMP_PRINTK is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EARLY_PRINTK=y
CONFIG_EARLY_PRINTK_UARTLITE_ADDRESS=0x00000000
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_IOMAP_COPY=yOn Thu, Nov 6, 2008 at 11:19 AM, Michal Simek <monstr@xxxxxxxxx> wrote:
Hi Terry,
John: can we disabled that? I haven't seen problem there but of course it will
> Ok I found that kernel debugging was in fact enabled, so that must be
> causing the problem (thanks!) - I believe it's enabled by default when
> using petalinux-new-platform to create an MMU system.
be better to find why is problem there.
yes of course. Could you please send your .config file?
> I disabled and
> get the results below.. I'm still trying to figure out what the problem
> is with the UDP_STEAM test (thoughts?) - that's the one I'm really
> interested in.
Thanks,
Michal
> ~ # ./netmeasure.sh -h 192.168.0.1 <http://192.168.0.1> -c 10
>
> This system has the MMU enabled and the ll_temac buffers are 2k each,
> and it's in 100Mb/s mode. This is on the S3ADSP 3400 VSK.
>
> *******************************************************************************
> 192.168.0.1 <http://192.168.0.1>; count=10
> inet addr:192.168.0.20 <http://192.168.0.20>> Linux uclinux 2.6.20-uc0 #9 Thu Nov 6 07:32:45 PST 2008 microblaze
> CPU-Family: MicroBlaze
> FPGA-Arch: Unknown
> CPU-Ver: 7.10.d
> CPU-MHz: 62.500000
> BogoMips: 31.02
> HW-Div: yes
> HW-Shift: yes
> Icache: 16kB
> Dcache: 16kB
> HW-Debug: yes
> CPU0
> 0: 119487 level OPB-INTC timer
> 1: 45493 level OPB-INTC xilinx_dma_tx_int
> 2: 59787 level OPB-INTC xilinx_dma_rx_int
> 3: 0 level OPB-INTC eth0
> 4: 1252 edge OPB-INTC uartlite
> MemTotal: 257664 kB
> MemFree: 236872 kB
> Buffers: 0 kB
>
> |TCP_STREAM| 10506 10571 10486 10451 10632 10642 10659 10701 10613
> 10691|Average|10595|
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> recv_response: partial response received: 0 bytes
> |UDP_STREAM| |Average|failed|
> |TCP_MAERTS| 3601 3668 3681 3682 3675 3647 3719 3715 3704 3669|Average|3676|
> |TCP_RR| 148 148 149 145 148 149 148 147 147 149|Average|147|
> |TCP_CRR| 44 43 43 44 44 44 44 44 44 44|Average|43|
> |UDP_RR| 162 163 163 160 163 163 160 164 164 163|Average|162|
> eth0 Link encap:Ethernet HWaddr 00:0A:35:05:05:08
> Bcast:192.168.0.255 <http://192.168.0.255> Mask:255.255.255.0
> <http://255.255.255.0>
> UP BROADCAST RUNNING MTU:1500 Metric:1> inet addr:127.0.0.1 <http://127.0.0.1> Mask:255.0.0.0
> RX packets:286592 errors:0 dropped:0 overruns:0 frame:0
> TX packets:343492 errors:0 dropped:0 overruns:0 carrier:0
> collisions:0 txqueuelen:1000
> RX bytes:119607693 (114.0 MiB) TX bytes:315564188 (300.9 MiB)
> Interrupt:3
>
> lo Link encap:Local Loopback
> <http://255.0.0.0>
> UP LOOPBACK RUNNING MTU:16436 Metric:1
> RX packets:0 errors:0 dropped:0 overruns:0 frame:0
> TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
> collisions:0 txqueuelen:0
> RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)
>
>
> *************************************************************************************
> On Wed, Nov 5, 2008 at 2:12 PM, Michal Simek <monstr@xxxxxxxxx
> > #netperf -H 192.168.0.1 <http://192.168.0.1> <http://192.168.0.1>> <mailto:monstr@xxxxxxxxx>> wrote:
>
> Hi all,
>
> I did some tests some days ago before starting your discussion.
> I made a page with some results for ml505 board with ll_temac. There
> are some
> options. On the base of your discussion I can tell that MMU kernel
> is a little
> bit slower than noMMU but difference is not big.
> You can look at it
> (http://monstr.eu/wiki/doku.php?id=kernel:testing:net).
>
> There is testing script too. Thanks for sending your results. Then
> we can look
> where your problem is.
>
> If anyone send my results for any devel board, hw configuration,
> etc. , I'll add
> it there. Just send output from script and some information about
> your hw
> configuration.
>
> Cheers,
> Michal
>
>
>
> Terry ONeal wrote:
> > I tried again on the spartan3E1600 board with the MMU enabled -
> > performance was just as bad.. I then took the original S3A3400 board
> > system, disabled the MMU, rebuilt the kernel, and got about a 10x
> > improvement:
> >
> > TCP STREAM TEST from 0.0.0.0 <http://0.0.0.0> <http://0.0.0.0>
> (0.0.0.0 <http://0.0.0.0> <http://0.0.0.0>)
> > port 0 AF_INET to 192.168.0.1 <http://192.168.0.1>
> <http://192.168.0.1> (192.168.0.1 <http://192.168.0.1>
> > <http://192.168.0.1>) port 0 AF_INET
> > Recv Send Send
> > Socket Socket Message Elapsed
> > Size Size Size Time Throughput
> > bytes bytes bytes secs. 10^6bits/sec
> >
> > 0 16384 16384 10.00 18.81
> >
> >
> >
> > So it appears to me that this is related to the MMU being enabled - or
> > the way the ll_temac driver is written..
> >
> > Terry
> >
> >
> >
> > On Tue, Nov 4, 2008 at 10:48 AM, Terry ONeal
> <terryoneal3@xxxxxxxxx <mailto:terryoneal3@xxxxxxxxx>
> > <mailto:terryoneal3@xxxxxxxxx <mailto:terryoneal3@xxxxxxxxx>>> wrote:
> >
> > I'm using the Spartan3A DSP 3400 board.. That is a good point,
> this
> > could be a physical layer issue, I've seen/heard of the same thing
> > in the past... I'm going to give a couple of the other reference
> > designs a try and see if other boards give better results..
> >
> > Thanks,
> > Terry
> >
> >
> >
> > On Tue, Nov 4, 2008 at 4:14 AM, Whitmore Ian J
> > <IJWHITMORE@xxxxxxxxxxx <mailto:IJWHITMORE@xxxxxxxxxxx>
> > [mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx> <mailto:IJWHITMORE@xxxxxxxxxxx <mailto:IJWHITMORE@xxxxxxxxxxx>>> wrote:
> >
> > Hello Terry,
> >
> >
> >
> > What Dev board/FPGA are you using?
> >
> >
> >
> > If it is Spartan 3A DSP 1800 (possibly other similar
> models are
> > affected also) there is a problem with the physical layer DCM
> > phase shift in the gmii – currently under investigation by
> > Xilinx (I've only experimented at gigabit speeds though).
> >
> >
> >
> > You could try adding the following line to the
> > implementation\system.ucf – in the GMII Receiver side DCM
> > constraints section
> >
> > "INST *gmii_rxc_dcm PHASE_SHIFT = 76"
> >
> >
> >
> > This has yielded significant performance increases in
> > performance at gigabit for me – but I still get some dropped
> > frames of data.
> >
> >
> >
> > With various tests (again at gigabit) I have found that
> > generally the bigger the ICache and DCache the better, mainly
> > ICache, (32K for both allows ~4.7MBytes/sec. ).
> >
> > The most significant increase I have seen is by increasing the
> > MTU to 8982 (~19.6 MBytes/sec) but this involves
> increasing your
> > TEMAC fifos to 16K to handle the larger frames, and also means
> > your infrastructure must support Jumbo frames.
> >
> >
> >
> > Hope this helps. I would probably try the larger ICache &
> > DCache first!
> >
> >
> >
> > If you do find any more performance let me know – always
> nice to
> > have a bit more bandwidth headroom!
> >
> >
> >
> > Ian
> >
> >
> ------------------------------------------------------------------------
> >
> > *From:* owner-microblaze-uclinux@xxxxxxxxxxxxxx
> <mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx>
> > <mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx
> <mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx>>
> <http://www.itee.uq.edu.au/%7Ejwilliams/mblaze-uclinux>> <mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx>
> > <mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx
> <mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx>>] *On Behalf Of
> > *Terry ONeal
> > *Sent:* 03 November 2008 22:21
> > *To:* microblaze-uclinux@xxxxxxxxxxxxxx
> <mailto:microblaze-uclinux@xxxxxxxxxxxxxx>
> > <mailto:microblaze-uclinux@xxxxxxxxxxxxxx
> <mailto:microblaze-uclinux@xxxxxxxxxxxxxx>>
> > *Subject:* [microblaze-uclinux] Ethernet performance with
> > xps_ll_temac
> >
> >
> >
> > Hi All, I'm working on a Microblaze system (MMU enabled) that
> > uses xps_ll_temac, and I'm seeing poor network performance
> when
> > running netperf. The phy is in 100Mb mode and I'm seeing
> around
> > 2.5Mb/s with the netperf TCP_STREAM test. Microblaze
> caches are
> > 16K, temac buffers are 4k, barrell shifter and HW
> multiplier are
> > turned on. I'm using petalinux sources I pulled from the svn
> > repository on 10/16/08.
> >
> > What is interesting is that it appears that the kernel is
> losing
> > timer ticks - if I configure netperf to run the test for 10
> > seconds, it actually takes 20 seconds (per my watch) to
> run, but
> > the kernel only thinks it's been runnning for 10 seconds.
> So it
> > appears the the ll_temac driver is hogging the CPU.
> >
> > I also put togther my own application that simply creates
> a UDP
> > socket and sends data through it as fast as it can - the
> > performance is a bit better than the netperf TCP test but
> still
> > way off from what I'm expecting (at least 25Mb/s).
> >
> > Has anyone had better luck with xps_ll_temac performance? Any
> > suggestions as to what may be going that is limiting the
> > performance?
> >
> > Thanks,
> > Terry
> >
> > The information contained in this E-Mail and any subsequent
> > correspondence is private and is intended solely for the
> intended
> > recipient(s). The information in this communication may be
> > confidential and/or legally privileged. Nothing in this
> e-mail is
> > intended to conclude a contract on behalf of QinetiQ or make
> > QinetiQ
> > subject to any other legally binding commitments, unless
> the e-mail
> > contains an express statement to the contrary or
> incorporates a
> > formal Purchase Order.
> >
> > For those other than the recipient any disclosure, copying,
> > distribution, or any action taken or omitted to be taken in
> > reliance
> > on such information is prohibited and may be unlawful.
> >
> > Emails and other electronic communication with QinetiQ may be
> > monitored and recorded for business purposes including
> security,
> > audit
> > and archival purposes. Any response to this email indicates
> > consent
> > to this.
> >
> > Telephone calls to QinetiQ may be monitored or recorded
> for quality
> > control, security and other business purposes.
> >
> > QinetiQ Limited
> > Registered in England & Wales: Company Number:3796233
> > Registered office: 85 Buckingham Gate, London SW1E 6PD, United
> > Kingdom
> > Trading address: Cody Technology Park, Cody Building, Ively
> > Road, Farnborough, Hampshire, GU14 0LX, United Kingdom
> > http://www.qinetiq.com/home/notices/legal.html
> > <http://www.QinetiQ.com/home/legal.html>
> >
> >
> >
> ___________________________
> microblaze-uclinux mailing list
> microblaze-uclinux@xxxxxxxxxxxxxx
> <mailto:microblaze-uclinux@xxxxxxxxxxxxxx>
> <http://www.itee.uq.edu.au/%7Elistarch/microblaze-uclinux/>
>
>
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@xxxxxxxxxxxxxx
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/