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[microblaze-uclinux] Uboot support for the New Flash
- To: microblaze-uclinux@xxxxxxxxxxxxxx
- Subject: [microblaze-uclinux] Uboot support for the New Flash
- From: "mak visp" <mak.visp@xxxxxxxxx>
- Date: Mon, 5 Jan 2009 11:20:21 -0800
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Hello,
Thanks Michal for your support.
I have a custom board, in which I am using Spansion Flash Memory
(WS256N series). I have two Flash memory chips interleaved to form a
32 bit wide Data Bus.
Previously, I was not able to query the Flash as it has a different
address location (0x555) instead of 0x55 which is being used by other
chips. Because of this the U-Boot was restarting. Currently, I have
made a small change in the file "cfi_flash.c". The "FLASH_OFFSET_CFI"
is chaged from 0x55 to 0x555. I have also defined the flag
"CFG_FLASH_CFI_AMD_RESET" as the reset code is also different. And now
I can see the U-boot prompt.
But at the end of the U-boot configuration, the Flash size is printed
as 0 kB. I tried to look into the source and enable the DEBUG and also
added the printf statement for "info->portwidth". Please find the file
attached log file. Up to the logic when the sectors are identified, it
was OK. But after that, the "info->portwidth" has became 0. (Line no.
183). The device is not even coming out of the CFI Query mode.
How can I add the support for my flash device?
--
Thanks
Mak
=================================================
FS-BOOT First Stage Bootloader (c) 2006 PetaLogix
=================================================
FS-BOOT: System initialisation completed.
FS-BOOT: No existing image in FLASH. Starting image download.
FS-BOOT: Waiting for SREC image....
FS-BOOT: Image download successful.
FS-BOOT: Warning image location differ from default boot location. Image will no
t boot automatically after POR.
FS-BOOT: Press 'n' to boot old image.
FS-BOOT: Use new image.
FS-BOOT: Booting image...
SDRAM :
Enabling caches :
Icache:OK
Dcache:OK
U-Boot Start:0x7ffc0000
Malloc Start:0x7ff60000
Board Info Start:0x7ff5ffd0
Boot Parameters Start:0x7ff4ffd0
FLASH:
flash detect cfi
info->portwidth: 1
fwc addr 8c000000 cmd 0 0 8bit x 8 bit
info->portwidth: 1
fwc addr 8c000555 cmd 98 98 8bit x 8 bit
info->portwidth: 1
is= cmd 51(Q) addr 8c000010 is= ff 51
info->portwidth: 2
fwc addr 8c000000 cmd 0 0000 16bit x 8 bit
info->portwidth: 2
fwc addr 8c000aaa cmd 98 9898 16bit x 8 bit
info->portwidth: 2
is= cmd 51(Q) addr 8c000020 is= ffff 5151
info->portwidth: 2
fwc addr 8c000000 cmd 0 0000 16bit x 16 bit
info->portwidth: 2
fwc addr 8c000aaa cmd 98 0098 16bit x 16 bit
info->portwidth: 2
is= cmd 51(Q) addr 8c000020 is= ffff 0051
info->portwidth: 4
fwc addr 8c000000 cmd 0 00000000 32bit x 8 bit
info->portwidth: 4
fwc addr 8c001554 cmd 98 98989898 32bit x 8 bit
info->portwidth: 4
is= cmd 51(Q) addr 8c000040 is= 00510051 51515151
info->portwidth: 4
fwc addr 8c000000 cmd 0 00000000 32bit x 16 bit
info->portwidth: 4
fwc addr 8c001554 cmd 98 00980098 32bit x 16 bit
info->portwidth: 4
is= cmd 51(Q) addr 8c000040 is= 00510051 00510051
info->portwidth: 4
is= cmd 52(R) addr 8c000044 is= 00520052 00520052
info->portwidth: 4
is= cmd 59(Y) addr 8c000048 is= 00590059 00590059
info->portwidth: 4
ushort addr is at 8c0000a0 info->portwidth = 4
addr[0] = 0x0
addr[1] = 0x1
addr[2] = 0x0
addr[3] = 0x1
addr[4] = 0x0
addr[5] = 0x0
addr[6] = 0x0
addr[7] = 0x0
retval = 0x1
device interface is 1
found port 4 chip 2 port 32 bits chip 16 bits
info->portwidth: 4
ushort addr is at 8c00004c info->portwidth = 4
addr[0] = 0x0
addr[1] = 0x2
addr[2] = 0x0
addr[3] = 0x2
addr[4] = 0x0
addr[5] = 0x0
addr[6] = 0x0
addr[7] = 0x0
retval = 0x2
8c000040 : 00 51 00 51 00 52 00 52 00 59 00 59 00 02 00 02 .Q.Q.R.R.Y.Y....
8c000050 : 00 00 00 00 00 40 00 40 00 00 00 00 00 00 00 00 .....@.@........
8c000060 : 00 00 00 00 00 00 00 00 00 00 00 00 00 17 00 17 ................
8c000070 : 00 19 00 19 00 00 00 00 00 00 00 00 00 06 00 06 ................
8c000080 : 00 09 00 09 00 0a 00 0a 00 00 00 00 00 04 00 04 ................
8c000090 : 00 04 00 04 00 03 00 03 00 00 00 00 00 19 00 19 ................
8c0000a0 : 00 01 00 01 00 00 00 00 00 06 00 06 00 00 00 00 ................
8c0000b0 : 00 03 00 03 00 03 00 03 00 00 00 00 00 80 00 80 ................
8c0000c0 : 00 00 00 00 00 fd 00 fd 00 00 00 00 00 00 00 00 ................
8c0000d0 : 00 02 00 02 00 03 00 03 00 00 00 00 00 80 00 80 ................
8c0000e0 : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
8c0000f0 : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
8c000100 : 00 50 00 50 00 52 00 52 00 49 00 49 00 31 00 31 .P.P.R.R.I.I.1.1
8c000110 : 00 34 00 34 00 10 00 10 00 02 00 02 00 01 00 01 .4.4............
8c000120 : 00 00 00 00 00 08 00 08 00 f3 00 f3 00 01 00 01 ................
8c000130 : 00 00 00 00 00 85 00 85 00 95 00 95 00 01 00 01 ................
manufacturer is 2
info->portwidth: 4
size_ratio 2 port 32 bits chip 16 bits
found 3 erase regions
info->portwidth: 4
long addr is at 8c0000b4 info->portwidth = 4
addr[0] = 0x0
addr[1] = 0x3
addr[2] = 0x0
addr[3] = 0x3
addr[4] = 0x0
addr[5] = 0x0
addr[6] = 0x0
addr[7] = 0x0
addr[8] = 0x0
addr[9] = 0x80
addr[a] = 0x0
addr[b] = 0x80
addr[c] = 0x0
addr[d] = 0x0
addr[e] = 0x0
addr[f] = 0x0
erase_region_count = 4 erase_region_size = 32768
info->portwidth: 4
long addr is at 8c0000c4 info->portwidth = 4
addr[0] = 0x0
addr[1] = 0xfd
addr[2] = 0x0
addr[3] = 0xfd
addr[4] = 0x0
addr[5] = 0x0
addr[6] = 0x0
addr[7] = 0x0
addr[8] = 0x0
addr[9] = 0x0
addr[a] = 0x0
addr[b] = 0x0
addr[c] = 0x0
addr[d] = 0x2
addr[e] = 0x0
addr[f] = 0x2
erase_region_count = 254 erase_region_size = 131072
info->portwidth: 4
long addr is at 8c0000d4 info->portwidth = 4
addr[0] = 0x0
addr[1] = 0x3
addr[2] = 0x0
addr[3] = 0x3
addr[4] = 0x0
addr[5] = 0x0
addr[6] = 0x0
addr[7] = 0x0
addr[8] = 0x0
addr[9] = 0x80
addr[a] = 0x0
addr[b] = 0x80
addr[c] = 0x0
addr[d] = 0x0
addr[e] = 0x0
addr[f] = 0x0
erase_region_count = 4 erase_region_size = 32768
info->portwidth: 0
info->portwidth: 0
ushort addr is at 8c000000 info->portwidth = 0
retval = 0x0
info->portwidth: 0
info->portwidth: 0
info->portwidth: 0
info->portwidth: 0
info->portwidth: 0
info->portwidth: 0
info->portwidth: 0
flash_protect ON: from 0x8C040000 to 0x8C07FFFF
0 kB
ETHERNET: MAC:<NULL>
*** Warning - bad CRC, using default environment
### main_loop entered: bootdelay=3
### main_loop: bootcmd="<UNDEFINED>"
BOOT>