Hi John,
thanks for your hints.
My design uses just parallel Flash. I only want to configure the
FPGA from
SPI flash. As I understand and as you said, after configuration the
parallel flash
should be available to the design (Microblaze in this case).
You might need to do some lower level debugging to find out what's
going on.
Yes - but how can I debug this at a lower level? Or is the lower
level this:
Also, try configuring the FPGA from SPI, then use XMD or
petalinux-jtag-boot to download u-boot directly into DDR and run it.
Does it work, and can it acess the (parallel) flash using the flinfo,
and erase commands?
I have not looked at XMD too much so I have to learn, how to use it.
Loading U-Boot this way directly in RAM is certainly a good way to
proceed. This could give me a good indication of what is going on.
I will give it a try - but unfortunately I will be away from my
development
system for a couple of days, though. I can probably report my findings
next weekend.
Regards,
Ulrich
Am 03.02.2009 um 03:30 schrieb John Williams:
Hi Ulrich,
On Tue, Feb 3, 2009 at 1:46 AM, Ulrich Hoffmann <uho@xxxxxxxx> wrote:
I followed the Petalinux documentation closely and created a
Microblaze
design with
fs-boot and also flashed u-boot and the kernel image fine. I can
now boot
Petalinux when I freshly download the Microblaze design via the JTAG
interface (USB-Cable).
You're off to a good start
What I would like to have is a Microblaze configuration that loads
into the
FPGA from SPI flash at reset time.
So, FPGA configuration from SPI flash, and u-boot/linux kernel from
parallel flash?
The SPI and parallel flash interfaces overlap some pins, for example
AB20 is spi_MISO and FLASH_D15. This is why Base System Builder lets
you instantiate either SPI flash or parallel flash.
But, from a configuration perspective, it shouldn't matter - after
configuration the pins revert to user IO. So, configuration via SPI
then access to parallel flash post-config should be fine.
You might need to do some lower level debugging to find out what's
going on.
Also, try configuring the FPGA from SPI, then use XMD or
petalinux-jtag-boot to download u-boot directly into DDR and run it.
Does it work, and can it acess the (parallel) flash using the flinfo,
and erase commands?
Regards,
John
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