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[microblaze-uclinux] [PATCH 3/3] microblaze: Use LOAD_OFFSET macro to get correct LMA for all sections
From: John Williams <john.williams@xxxxxxxxxxxxx>
Currently, vmlinux has LMA==VMA for all sections, which is wrong for MMU
kernels. Previous patches in this series defined the LOAD_OFFSET constant,
now we make use of it in our link script.
Other minor changes in this patch:
* brace/indenting cleanup of some sections
* put __fdt_* symbols in their own section, and apply LOAD_OFFSET fixup
Signed-off-by: John Williams <john.williams@xxxxxxxxxxxxx>
---
arch/microblaze/kernel/vmlinux.lds.S | 46 ++++++++++++++++++++--------------
1 files changed, 27 insertions(+), 19 deletions(-)
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index c033c1e..4e9d232 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -12,13 +12,14 @@ OUTPUT_FORMAT("elf32-microblaze", "elf32-microblaze", "elf32-microblaze")
OUTPUT_ARCH(microblaze)
ENTRY(_start)
+#include <asm/page.h>
#include <asm-generic/vmlinux.lds.h>
jiffies = jiffies_64 + 4;
SECTIONS {
. = CONFIG_KERNEL_START;
- .text : {
+ .text : AT(ADDR(.text) - LOAD_OFFSET) {
_text = . ;
_stext = . ;
*(.text .text.*)
@@ -33,17 +34,16 @@ SECTIONS {
}
. = ALIGN (4) ;
- __fdt_blob : {
+ __fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) {
_fdt_start = . ; /* place for fdt blob */
- *(__fdt_blob) ; /* Any link-placed DTB */
. = _fdt_start + 0x4000; /* Pad up to 16kbyte */
_fdt_end = . ;
}
. = ALIGN(16);
- RODATA
+ RO_DATA(16)
. = ALIGN(16);
- __ex_table : {
+ __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
__start___ex_table = .;
*(__ex_table)
__stop___ex_table = .;
@@ -53,7 +53,7 @@ SECTIONS {
* sdata2 section can go anywhere, but must be word aligned
* and SDA2_BASE must point to the middle of it
*/
- .sdata2 : {
+ .sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) {
_ssrw = .;
. = ALIGN(4096); /* page aligned when MMU used - origin 0x8 */
*(.sdata2)
@@ -64,11 +64,14 @@ SECTIONS {
}
_sdata = . ;
- .data ALIGN (4096) : { /* page aligned when MMU used - origin 0x4 */
+ /* page aligned when MMU used - origin 0x4 */
+ .data ALIGN (4096) : AT(ADDR(.data) - LOAD_OFFSET) {
*(.data)
}
. = ALIGN(32);
- .data.cacheline_aligned : { *(.data.cacheline_aligned) }
+ .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
+ *(.data.cacheline_aligned)
+ }
_edata = . ;
/* Reserve some low RAM for r0 based memory references */
@@ -78,16 +81,18 @@ SECTIONS {
/* The initial task */
. = ALIGN(8192);
- .data.init_task : { *(.data.init_task) }
+ .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
+ *(.data.init_task)
+ }
/* Under the microblaze ABI, .sdata and .sbss must be contiguous */
. = ALIGN(8);
- .sdata : {
+ .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
_ssro = .;
*(.sdata)
}
- .sbss : {
+ .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) {
_ssbss = .;
*(.sbss)
_esbss = .;
@@ -99,7 +104,7 @@ SECTIONS {
__init_begin = .;
. = ALIGN(4096);
- .init.text : {
+ .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
_sinittext = . ;
*(.init.text)
*(.exit.text)
@@ -107,28 +112,30 @@ SECTIONS {
_einittext = .;
}
- .init.data : { *(.init.data) }
+ .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
+ *(.init.data)
+ }
. = ALIGN(4);
- .init.ivt : {
+ .init.ivt : AT(ADDR(.init.ivt) - LOAD_OFFSET) {
__ivt_start = .;
*(.init.ivt)
__ivt_end = .;
}
- .init.setup : {
+ .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
__setup_start = .;
*(.init.setup)
__setup_end = .;
}
- .initcall.init : {
+ .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET ) {
__initcall_start = .;
INITCALLS
__initcall_end = .;
}
- .con_initcall.init : {
+ .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
__con_initcall_start = .;
*(.con_initcall.init)
__con_initcall_end = .;
@@ -138,7 +145,7 @@ SECTIONS {
__init_end_before_initramfs = .;
- .init.ramfs ALIGN(4096) : {
+ .init.ramfs ALIGN(4096) : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
__initramfs_start = .;
*(.init.ramfs)
__initramfs_end = .;
@@ -154,7 +161,8 @@ SECTIONS {
}
__init_end = .;
- .bss ALIGN (4096) : { /* page aligned when MMU used */
+ .bss ALIGN (4096) : AT(ADDR(.bss) - LOAD_OFFSET) {
+ /* page aligned when MMU used */
__bss_start = . ;
*(.bss*)
*(COMMON)
--
1.5.3.8
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