Re: [microblaze-uclinux] Using impulse's C-to-FPGA tool with Petalinux ...

[Nicolas Herve <nicolas.herve@xxxxxxxxx>]

2009/7/21 Colin Paul Gloster <Colin_Paul_Gloster@xxxxxxx>:
> On Tue, 21 Jul 2009, Nicolas Herve wrote:
>
> Why use the C to FPGA tool? If you have accepted the Petalinux
> rationale that absolute performance is not essential, then why do you
> want to synthesize C? If you do not better performance, then why not
> write those demanding cores in VHDL?
>
> Regards,
> Colin Paul



Ok, that's a pertinent question.

In fact I am not restricted to the Impulse C-to-FPGA tool their is
some other commercial tools and also some university free tools that
do the same job but I though [1] this one was implementing the FSL
FIFO kernel driver and would permits to economize some more
development effort.

First of all I am concerning with methodology and not really on
implementing a specific application, the applications will only serve
as a proof of concept.

Writing its own accelerators cores in VHDL or other HDL language would
generally permits to have better performance and more control on the
architecture than one generated but is also time consuming.
In a typical streaming application they may have several bottlenecks
and candidates for hardware acceleration.
The use of such a tool permits avoid the effort where a HDL engineer
will not do really better than the tool, and it will also serves as an
engineer objective. Some functions may be pretty good accelerated by
the tool, some not, so engineers will concentrates on writing HDL
where they are more efficient.


Nicolas

---
[1] now after reading John's reply, I will check this again)



Nicolas
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@xxxxxxxxxxxxxx
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/