Re: [partial-reconfig] Virtex-4 slice-based bus macros

[Pete Sedcole <pete.sedcole@xxxxxxxxxxxxxx>]

Hi Philipp

Philipp Reinkemeier wrote:
> Sounds like you can help me out. I'm just making PR on "xc2v1000" and 
> later on plans are to make DPR on a virtex4. Im currently using ISE 
> 7.1i with SP4, but the reconfig-flow doesn't seem to work. So may be 
> you can tell me what SP you use with ISE 6.3i, because i heard that 
> it's a little buggy with SP3.

I've not really used ISE 7.x nor ISE 8.x at all. All the work I've done 
is with ISE 6.3i SP3.

As far as I know, the standard tools don't yet support the Virtex 4 for 
dynamic reconfiguration. This may have changed in ISE 8.x but I don't know.

> As i am reading in that posted fpga_editor skript you are using 
> "xc4vlx15" as the your device. Have you ever done DPR with that and 
> ISE 6.3 and made any experiences which you can share?

I have a Xilinx ML401 dev board which has the XC4VLX15 device on it. I 
have done dynamic reconfiguration using this. However, I did this as 
part of an investigation into new DPR flows, so I didn't use the Modular 
Design flow: I had use of some special tools, and had to write many 
scripts myself. There's more information here:

http://cas.ee.ic.ac.uk/people/nps/thesis/6_reconfiguration.pdf

Pete
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