The RAMnet project aims to design a new memory interconnect, based on principles derived from IBM's very successful mainframe disk architecture.
Here is a basic building block of the RAMnet architecture, attached to a processor module:
RAMnet scales up by replicating memory controllers as needed. The controller nearest the CPU needs a faster interconnect, because it is a potential bottleneck. However, allowing alternative paths through the RAMnet means that no other path needs to have unusually high bandwidth. Also, each path is relatively short, which eliminates the need for clocking a long bus at high speed. Details like how to clock the components still need some work.
Here is an example of bigger RAMnet, showing several competing DRAM accesses being routed different ways through the network:
Note how DRAMs A and B have already routed their traffic through non-conflicting paths; C has not yet done so, but has the potential to do so.
Clearly, the high-speed interface required between the memory controller closest to the CPU and the processor module presents the most difficult design problem at the board level. An alternative would be to include it in a multichip module (MCM) with the processor module, much as the L2 cache was packaged in the Pentium II. For example:
Here, the CPU module is shown as comprising a pair of processors sharing an L2 cache. However, that kind of detail is irrelevant to the general idea of RAMnet.
How Feasible is All This?
HyperTransport appears to provide many of the necessary building blocks – a narrow, high-speed bus with very high-speed options, which could fit the need for the link to the processor chip, and high-speed switching to support construction of the required hierarchy.
RAMnet Projects
- outline of the RAMnet solution – here is a paper which outlines how the hierarchy might look; here is another, extending the ideas to reconfigurable computers (built with FPGAs)
- detail of a solution
filling in the gaps, adapting details to off-the-shelf components, doing simulations, etc. will be nice projects
Other Areas of Research
For now, my home page is the best place to start; there are good links from my Architecture page.
History
Check out my memory history pages.
Philip Machanick philip.machanick-AT.NO.SPAM-gmail.com